Network element for switching time division multiplex signals
    1.
    发明申请
    Network element for switching time division multiplex signals 有权
    用于切换时分复用信号的网元

    公开(公告)号:US20100157994A1

    公开(公告)日:2010-06-24

    申请号:US12592796

    申请日:2009-12-03

    CPC classification number: H04Q3/0045 H04L49/25 H04L49/3072

    Abstract: In order to provide a network element for switching time-division multiplex signals in a transport network, which allows higher capacity at moderate equipment costs, the network element has a number of input ports (I; IO1-IO8), a number of output ports (O; IO1-IO8) and a switch fabric ( ) SF; 58) interconnecting the input and output ports (IO1-IO8). The switching fabric ( ) SF; 58) is a cell based switch comprising one or more switch modules ( ) SE1-SEn) which are adapted to switch fixed-length cells on the basis of addresses contained in cell headers of the cells. The input ports (I) contain a segmentation device (11) for segmenting an input time-division multiplex signal into fixed-length cells and assigning address information to each cell. The output ports (O) contain a reassembly device (14) for reassembling cells received from said switch fabric (SF; 58) into an output time-division multiplex signal. The address information contains a fabric address (H1, H2) and a TDM address (P0, P1). The switch fabric switches the cells in accordance with the fabric address (H1, H2) to a corresponding output port (O) and the reassembly device (14) reassembles the cells in accordance with the TDM address (P0, P1).

    Abstract translation: 为了提供用于在传输网络中切换时分复用信号的网络元件,其允许以适中的设备成本实现更高的容量,网络元件具有多个输入端口(I; IO1-IO8),多个输出端口 (O; IO1-IO8)和交换结构()SF; 互连输入和输出端口(IO1至IO8)。 交换结构()SF; 58)是基于小区的交换机,其包括一个或多个交换模块(SE1-SEn),其适于基于小区的小区头部中包含的地址来切换固定长度的小区。 输入端口(I)包含用于将输入时分复用信号分割为固定长度单元并将地址信息分配给每个单元的分段设备(11)。 输出端口(O)包含用于将从所述交换结构(SF; 58)接收的单元重新组合成输出时分复用信号的重组装置(14)。 地址信息包含结构地址(H1,H2)和TDM地址(P0,P1)。 交换结构根据结构地址(H1,H2)将单元切换到对应的输出端口(O),重新组装设备(14)根据TDM地址(P0,P1)重新组合单元。

    Method, clock generator module and receiver module for synchronizing a receiver module
    3.
    发明授权
    Method, clock generator module and receiver module for synchronizing a receiver module 失效
    方法,时钟发生器模块和用于同步接收器模块的接收器模块

    公开(公告)号:US06816818B2

    公开(公告)日:2004-11-09

    申请号:US10024025

    申请日:2001-12-21

    Abstract: A method of synchronizing at least one receiver module (MOD 1, MOD2), in particular a receiver module in a telecommunications network or in a network device of a telecommunications network, has the following steps: A first clock signal (TS 1) and a second clock signal (TS2) are sent to the at least one receiver module (MOD 1, MOD2). In addition, at least one item of master-slave-status information (MSX) about the at least one first clock signal (TS1) and/or the second clock signal (TS2) is sent to the at least one receiver module (MOD1, MOD2). Based on the item of master-slave-status information (MSX), the at least one receiver module (MOD 1, MOD2) selects the first clock signal (TS 1) or the second clock signal (TS2) as master synchronization signal for its synchronization.

    Abstract translation: 一种同步至少一个接收机模块(MOD1,MOD2)的方法,特别是在电信网络或电信网络的网络设备中的接收机模块,具有以下步骤:第一时钟信号(TS 1)和 第二时钟信号(TS2)被发送到至少一个接收器模块(MOD1,MOD2)。 另外,关于至少一个第一时钟信号(TS1)和/或第二时钟信号(TS2)的至少一个主从状态信息(MSX)被发送到至少一个接收器模块(MOD1, MOD2)。 基于主从状态信息(MSX)的项目,至少一个接收机模块(MOD1,MOD2)选择第一时钟信号(TS 1)或第二时钟信号(TS2)作为其主同步信号 同步

    Switching network for switching channels
    4.
    发明授权
    Switching network for switching channels 失效
    切换通道的交换网络

    公开(公告)号:US5311506A

    公开(公告)日:1994-05-10

    申请号:US887075

    申请日:1992-05-22

    Applicant: Werner Beisel

    Inventor: Werner Beisel

    CPC classification number: H04Q11/04

    Abstract: In a data transmission system, a switching network in a connection node (VK) includes switch groups (SCH) for switching channels, which are each assigned to one or more time slots within the framework of a multiplex time signal, e.g. virtual containers of a STM-1 frame according to CCITT recommendations G707 to G.709. Each switch group (SCH) is modular and linked to one another, and contains a memory (DS) with several independently readable memory outputs (SA1 to SA4), through which the storage area can be accessed. Each part signal of a respective memory address can be connected with a data output of the switch group (SCH) through selectors (SEL1 to SEL4). A connecting memory (VB1 to VB4) controls the reading of each part signal from the memory (DS) to a memory output (SA1 to SA4) and a selector (SEL1 to SEL4). A coupling field may be composed of switch groups (SCH) arranged in columns and lines, as required. Each data outputs (DA1 to DA4) of one switch group (SCH MN) is connected to a connection input (VE1 to VE4) of the following switch group.

    Abstract translation: 在数据传输系统中,连接节点(VK)中的交换网络包括用于切换信道的交换机组(SCH),每个分组分配给多个时间信号框架内的一个或多个时隙。 根据CCITT建议G707至G.709的STM-1帧的虚拟容器。 每个交换机组(SCH)是模块化的并且彼此链接,并且包含具有多个可独立读取的存储器输出(SA1至SA4)的存储器(DS),通过该存储器存储区可以访问存储区域。 各个存储器地址的每个部分信号可以通过选择器(SEL1至SEL4)与开关组(SCH)的数据输出连接。 连接存储器(VB1至VB4)控制从存储器(DS)到存储器输出(SA1至SA4)和选择器(SEL1至SEL4)的每个部分信号的读取。 根据需要,耦合场可以由以列和线排列的开关组(SCH)组成。 一个开关组(SCH MN)的每个数据输出(DA1至DA4)连接到以下开关组的连接输入(VE1至VE4)。

    Network element for switching time division multiplex signals
    5.
    发明授权
    Network element for switching time division multiplex signals 有权
    用于切换时分复用信号的网元

    公开(公告)号:US08374177B2

    公开(公告)日:2013-02-12

    申请号:US12592796

    申请日:2009-12-03

    CPC classification number: H04Q3/0045 H04L49/25 H04L49/3072

    Abstract: In order to provide a network element for switching time-division multiplex signals in a transport network, which allows higher capacity at moderate equipment costs, the network element has a number of input ports (I; IO1-IO8), a number of output ports (O; IO1-IO8) and a switch fabric ( ) SF; 58) interconnecting the input and output ports (IO1-IO8). The switching fabric ( ) SF; 58) is a cell based switch comprising one or more switch modules ( ) SE1-SEn) which are adapted to switch fixed-length cells on the basis of addresses contained in cell headers of the cells. The input ports (I) contain a segmentation device (11) for segmenting an input time-division multiplex signal into fixed-length cells and assigning address information to each cell. The output ports (O) contain a reassembly device (14) for reassembling cells received from said switch fabric (SF; 58) into an output time-division multiplex signal. The address information contains a fabric address (H1, H2) and a TDM address (P0, P1). The switch fabric switches the cells in accordance with the fabric address (H1, H2) to a corresponding output port (O) and the reassembly device (14) reassembles the cells in accordance with the TDM address (P0, P1).

    Abstract translation: 为了提供用于在传输网络中切换时分复用信号的网络元件,其允许以适中的设备成本实现更高的容量,网络元件具有多个输入端口(I; IO1-IO8),多个输出端口 (O; IO1-IO8)和交换结构()SF; 互连输入和输出端口(IO1至IO8)。 交换结构()SF; 58)是基于小区的交换机,其包括一个或多个交换模块(SE1-SEn),其适于基于小区的小区头部中包含的地址来切换固定长度的小区。 输入端口(I)包含用于将输入时分复用信号分割为固定长度单元并将地址信息分配给每个单元的分段设备(11)。 输出端口(O)包含用于将从所述交换结构(SF; 58)接收的单元重新组合成输出时分复用信号的重组装置(14)。 地址信息包含结构地址(H1,H2)和TDM地址(P0,P1)。 交换结构根据结构地址(H1,H2)将单元切换到对应的输出端口(O),重新组装设备(14)根据TDM地址(P0,P1)重新组合单元。

    Synchronous transmission system with fault location function and monitoring device therefor
    7.
    发明授权
    Synchronous transmission system with fault location function and monitoring device therefor 有权
    具有故障定位功能的同步传输系统及其监控装置

    公开(公告)号:US06545980B1

    公开(公告)日:2003-04-08

    申请号:US09171238

    申请日:1998-12-15

    Abstract: A synchronous transmission system is disclosed in which the transmission paths (leased lines) extend over several individual transmission systems (Sx). Monitoring devices (NIM) with access to at least one byte of the control data area are provided in synchronous transmission systems to write data into or read data out of the control data area. The monitoring devices (NIM) may thus be controlled and monitored by a signal source (S1).

    Abstract translation: 公开了一种同步传输系统,其中传输路径(租用线路)在几个单独的传输系统(Sx)上延伸。 在同步传输系统中提供具有访问控制数据区域的至少一个字节的监控设备(NIM),以将数据写入或从控制数据区域读出数据。 监控设备(NIM)因此可以被信号源(S1)控制和监视。

    Hitless protection switching
    8.
    发明授权
    Hitless protection switching 有权
    无限保护切换

    公开(公告)号:US07414965B2

    公开(公告)日:2008-08-19

    申请号:US10815723

    申请日:2004-04-02

    CPC classification number: H04B1/74

    Abstract: A network element with equipment protection has first and second redundant signal paths for first and second redundant signals; a selector for selecting either of the two redundant signals as active; and first and second transition monitors coupled to the first and second signal paths, respectively, for monitoring the first and second signals for bit level transitions. The selector is controlled by the transition monitors to alter selection in the case that the selected signal does not contain bit level transitions while the non-selected signal does.

    Abstract translation: 具有设备保护的网络元件具有用于第一和第二冗余信号的第一和第二冗余信号路径; 用于选择两个冗余信号中的任一个作为活动的选择器; 以及分别耦合到第一和第二信号路径的第一和第二转换监视器,用于监视第一和第二信号以进行位电平转换。 在选择的信号不包含位电平转换而非选择信号的情况下,选择器由转换监视器控制以改变选择。

    Network device and method for delay compensation of data packets

    公开(公告)号:US07120169B2

    公开(公告)日:2006-10-10

    申请号:US10022893

    申请日:2001-12-20

    Abstract: A network device (NWE) for a digital transmission network with synchronous digital hierarchy receives data steams containing frames with data packets mapped therein and addressed by a phase reference identifier. Internally, the network device has redundant transfer paths which potentially cause different delay. The network element compensates for that delay by adjusting the phase reference identifier allocated to a respective data packet by a predetermined phase correcting value, leading in the phase, which corresponds to a maximum expected delay for transfer of the data packets on internal transfer paths, and by buffering the data packet by a buffering time such that its buffering time and its delay actually needed for passing through the network device in total correspond to the maximum expected delay taken into account by the phase adjustment.

    Digital communication electrical/optical access node having buffer
memory matrix for switchable multi-channel bidirectional transmission
    10.
    发明授权
    Digital communication electrical/optical access node having buffer memory matrix for switchable multi-channel bidirectional transmission 失效
    具有用于可切换多通道双向传输的缓冲存储器矩阵的数字通信电气/光学访问节点

    公开(公告)号:US5214638A

    公开(公告)日:1993-05-25

    申请号:US610524

    申请日:1990-11-08

    CPC classification number: H04Q11/04

    Abstract: The network access node of a digital communication system for the bidirectional transmission of message signals between, for example, a switching center and subscribers as an electrically switchable connection between the lines to the switching centers with a first interface and the lines to the subscribers with a second interface. The first interface is preferably an interface for a time-division multiplex signal with a transmission rate of 2 Mbit/s; the second interface is preferably an interface for signals in multiple access with time-division multiplex (TDM/TDMA). The buffer memory of the TDM/TDMA system is made up of partial memories arranged as a matrix. The partial memories are used simultaneously as a buffer memory for the circuit of the paths.

    Abstract translation: 数字通信系统的网络接入节点,用于在诸如交换中心和用户之间的消息信号的双向传输之间,作为具有第一接口的交换中心的线路之间的电可切换连接,以及具有用户 第二个接口 第一接口优选地是用于具有2Mbit / s的传输速率的时分复用信号的接口; 第二接口优选地是用于具有时分复用(TDM / TDMA)的多路访问中的信号的接口。 TDM / TDMA系统的缓冲存储器由作为矩阵排列的部分存储器构成。 部分存储器同时用作路径电路的缓冲存储器。

Patent Agency Ranking