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1.发明申请SYSTEMS, METHODS, AND APPARATUS FOR CONNECTION FAULT SELF-MONITORING WITH DC BIAS CURRENT 有权用于连接故障自动监测与直流偏置电流的系统，方法和装置公开(公告)号：US20120013345A1
公开(公告)日：2012-01-19
申请号：US12837605
申请日：2010-07-16
IPC分类号： G01R31/04
CPC分类号： G01D3/08 , G01R31/026 , G01R31/08 , G01R31/2829
摘要： Certain embodiments of the invention may include systems, methods, and apparatus for providing connection fault self-monitoring with DC bias current. According to an example embodiment of the invention, a method is provided for obtaining measurements and detecting connectivity faults associated with a voltage mode sensor. The method can include coupling a DC bias current into a circuit. The circuit includes a voltage mode sensor, and the voltage mode sensor can output a time varying signal. The method can also include setting a nominal level of the DC bias current, monitoring a voltage associated with the DC bias current, and determining circuit connectivity status based at least in part on monitoring the voltage.
摘要翻译： 本发明的某些实施例可以包括用于使用DC偏置电流提供连接故障自监视的系统，方法和装置。 根据本发明的示例实施例，提供了一种用于获得与电压模式传感器相关联的测量和检测连通性故障的方法。 该方法可以包括将DC偏置电流耦合到电路中。 电路包括电压模式传感器，电压模式传感器可以输出时变信号。 该方法还可以包括设置直流偏置电流的额定电平，监视与直流偏置电流相关的电压，以及至少部分地基于监视电压来确定电路连接状态。
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公开(公告)号：US20200065271A1
公开(公告)日：2020-02-27
申请号：US16366504
申请日：2019-03-27
申请人： Matthew J. Adiletta , Brad Burres , Duane Galbi , Amit Kumar , Yadong Li , Salma Mirza , Jose Niell , Thomas E. Willis , William Duggan
发明人： Matthew J. Adiletta , Brad Burres , Duane Galbi , Amit Kumar , Yadong Li , Salma Mirza , Jose Niell , Thomas E. Willis , William Duggan
摘要： Technologies for flexible I/O endpoint acceleration include a computing device having a root complex, a soft endpoint coupled to the root complex, and an offload complex coupled to the soft endpoint. The soft endpoint establishes an emulated endpoint hierarchy based on endpoint firmware. The computing device may program the endpoint firmware. The soft endpoint receives an I/O transaction that originates from the root complex and determines whether to process the I/O transaction. The soft endpoint may process the I/O transaction or forward the I/O transaction to the offload complex. The soft endpoint may encapsulate the I/O transaction with metadata and forward the encapsulated transaction to the offload complex. The soft endpoint may store responses from the offload complex in a history buffer and retrieve the responses in response to retried I/O transactions. The I/O transaction may be a PCI Express transaction layer packet. Other embodiments are described and claimed.
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公开(公告)号：US06618235B1
公开(公告)日：2003-09-09
申请号：US10063192
申请日：2002-03-28
申请人： Robert Gregory Wagoner , Fred Henry Boettner , William Duggan Brackman, Jr. , James Michael Nowak
发明人： Robert Gregory Wagoner , Fred Henry Boettner , William Duggan Brackman, Jr. , James Michael Nowak
IPC分类号： H01C712
CPC分类号： H02M1/34 , H02M3/155 , H02M2001/348 , H03K17/0814 , H03K17/08144 , H03K17/082
摘要： A voltage transient suppression circuit for power electronic circuits comprising: a snubber circuit having a resistor and a first and second capacitive element connected in series with a switching power semiconductor; and a sensing logic device connected in parallel with the snubber circuit; the logic circuit being configured to receive voltage signals indicative of said first and second capacitive elements.
摘要翻译： 一种用于电力电子电路的电压瞬变抑制电路，包括：缓冲电路，具有电阻器和与开关功率半导体串联连接的第一和第二电容元件; 以及与所述缓冲电路并联连接的感测逻辑器件; 逻辑电路被配置为接收指示所述第一和第二电容元件的电压信号。
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公开(公告)号：US20200073846A1
公开(公告)日：2020-03-05
申请号：US16366496
申请日：2019-03-27
申请人： Matthew J. Adiletta , Bradley Burres , Duane Galbi , Amit Kumar , Yadong Li , Salma Mizra , Jose Niell , Thomas E. Willis , William Duggan
发明人： Matthew J. Adiletta , Bradley Burres , Duane Galbi , Amit Kumar , Yadong Li , Salma Mizra , Jose Niell , Thomas E. Willis , William Duggan
摘要： Technologies for flexible I/O protocol acceleration include a computing device having a root complex, a smart endpoint coupled to the root complex, and an offload complex coupled to the smart endpoint. The smart endpoint receives an I/O transaction that originates from the root complex and parses the I/O transaction based on an I/O protocol and identifies an I/O command. The smart endpoint may parse the I/O transaction based on endpoint firmware that may be programmed by the computing device. The smart endpoint accelerates the I/O command and provides a smart context to the offload complex. The smart endpoint may copy the I/O command to memory of the smart endpoint or the offload complex. The smart endpoint may identify protocol data based on the I/O command and copy the protocol data to the memory of the smart endpoint or the offload complex. Other embodiments are described and claimed.
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公开(公告)号：USD504281S1
公开(公告)日：2005-04-26
申请号：US29194768
申请日：2003-12-01
申请人： James William Duggan
设计人： James William Duggan
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6.发明授权Systems, methods, and apparatus for connection fault self-monitoring with DC bias current 有权用直流偏置电流连接故障自监控的系统，方法和设备公开(公告)号：US08154305B2
公开(公告)日：2012-04-10
申请号：US12837605
申请日：2010-07-16
CPC分类号： G01D3/08 , G01R31/026 , G01R31/08 , G01R31/2829
摘要： Certain embodiments of the invention may include systems, methods, and apparatus for providing connection fault self-monitoring with DC bias current. According to an example embodiment of the invention, a method is provided for obtaining measurements and detecting connectivity faults associated with a voltage mode sensor. The method can include coupling a DC bias current into a circuit. The circuit includes a voltage mode sensor, and the voltage mode sensor can output a time varying signal. The method can also include setting a nominal level of the DC bias current, monitoring a voltage associated with the DC bias current, and determining circuit connectivity status based at least in part on monitoring the voltage.
摘要翻译： 本发明的某些实施例可以包括用于使用DC偏置电流提供连接故障自监视的系统，方法和装置。 根据本发明的示例实施例，提供了一种用于获得与电压模式传感器相关联的测量和检测连通性故障的方法。 该方法可以包括将DC偏置电流耦合到电路中。 电路包括电压模式传感器，电压模式传感器可以输出时变信号。 该方法还可以包括设置直流偏置电流的标称电平，监视与直流偏置电流相关联的电压，以及至少部分地基于监视电压来确定电路连接状态。
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