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公开(公告)号：US07489192B2
公开(公告)日：2009-02-10
申请号：US11803509
申请日：2007-05-14
IPC分类号： H03F1/36
CPC分类号： H03F3/193 , H03F1/26 , H03F1/347 , H03F3/195 , H03F3/45183 , H03F2200/294 , H03F2200/391 , H03F2200/451 , H03F2200/537 , H03F2203/45386 , H03F2203/45644 , H03F2203/45704
摘要： A low-noise amplifier, that utilizes multiple monolithic transformer magnetic feedback to simultaneously neutralize the gate-drain overlap capacitance of the amplifying transistor and achieve high gain at high frequencies when driving an on-chip capacitance, is shown. The multiple transformer topology permits negative and positive feedback to be applied constructively, allowing for a stable design with adequate gain and large reverse isolation without Noise Figure degradation.
摘要翻译： 一种低噪声放大器，利用多个单片变压器磁反馈来同时中和放大晶体管的栅 - 漏重叠电容，并在驱动片上电容时在高频下实现高增益。 多重变压器拓扑允许建设性地施加负反馈和正反馈，允许具有足够增益和大反向隔离的稳定设计，而没有噪声系数降级。
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公开(公告)号：US20070285162A1
公开(公告)日：2007-12-13
申请号：US11801945
申请日：2007-05-10
IPC分类号： H03F1/26
CPC分类号： H03F1/3276 , H03F1/347 , H03F3/193
摘要： A predistortion method for CMOS Low-Noise-Amplifiers (LNAs) to be used in Broadband Wireless applications is presented. The method is based on the nulling of the third order Intermodulation distortion (IMD3) of the main amplifier by a highly nonlinear predistortion branch. Maximum third order product cancellation is ensured by a transformer feedback method. The technique improves linearity in a wide range of input power without significant gain and Noise Figure. (NF) degradation. Simulation results on a 1-V LNA indicate a 10.3 dB improvement in the Input Third-Order Intercept Point (IIP3) with a reduction of only 1 dB and 0.44dB in amplifier gain and NF respectively.
摘要翻译： 提出了一种用于宽带无线应用的CMOS低噪声放大器（LNA）的预失真方法。 该方法基于通过高度非线性预失真分支对主放大器的三阶互调失真（IMD3）的归零。 通过变压器反馈方法确保最大三阶乘积消除。 该技术提高了宽输入功率的线性度，而没有显着的增益和噪声系数。 （NF）降解。 1 V LNA的仿真结果表明，输入三阶截取点（IIP3）的增益为10.3 dB，放大器增益和NF分别仅降低了1 dB和0.44dB。
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公开(公告)号：US20120223176A1
公开(公告)日：2012-09-06
申请号：US13473368
申请日：2012-05-16
申请人： Yannis Papananos
发明人： Yannis Papananos
IPC分类号： H01F41/06
CPC分类号： H01F27/2804 , H01F17/0013 , H01F2017/0086 , H01F2027/2809 , H01L23/5227 , H01L2924/0002 , H03H7/42 , H03H2001/0064 , Y10T29/4902 , Y10T29/49071 , Y10T29/49073 , H01L2924/00
摘要： Integrated high frequency balanced-to-unbalanced transformers and inductors suitable for operation in high frequencies, such as radio frequencies. Embodiments disclosed give consideration to issues related to the layout of the top and bottom inductors for the minimization of capacitive effects between layers and methods of manufacturing thereof. A displacement between the conductive paths of the top inductor and the bottom inductor is shown that provides for superior performance over prior art solutions.
摘要翻译： 集成的高频平衡至不平衡变压器和电感器，适用于高频操作，如无线电频率。 所公开的实施例考虑了用于最小化层之间的电容效应的顶部和底部电感器的布局的相关问题及其制造方法。 示出了顶部电感器和底部电感器的导电路径之间的位移，其提供优于现有技术解决方案的优异性能。
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公开(公告)号：US20110018672A1
公开(公告)日：2011-01-27
申请号：US12897446
申请日：2010-10-04
申请人： Yannis Papananos
发明人： Yannis Papananos
CPC分类号： H01F27/2804 , H01F17/0013 , H01F2017/0086 , H01F2027/2809 , H01L23/5227 , H01L2924/0002 , H03H7/42 , H03H2001/0064 , Y10T29/4902 , Y10T29/49071 , Y10T29/49073 , H01L2924/00
摘要： Integrated high frequency balanced-to-unbalanced transformers and inductors suitable for operation in high frequencies, such as radio frequencies. Embodiments disclosed give consideration to issues related to the layout of the top and bottom inductors for the minimization of capacitive effects between layers. A displacement between the conductive paths of the top inductor and the bottom inductor is shown that provides for superior performance over prior art solutions.
摘要翻译： 集成的高频平衡至不平衡变压器和电感器，适用于高频操作，如无线电频率。 所公开的实施例考虑了用于最小化层之间的电容效应的顶部和底部电感器的布局相关的问题。 示出了顶部电感器和底部电感器的导电路径之间的位移，其提供优于现有技术解决方案的优异性能。
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公开(公告)号：US07554397B2
公开(公告)日：2009-06-30
申请号：US11801945
申请日：2007-05-10
IPC分类号： H03F1/26
CPC分类号： H03F1/3276 , H03F1/347 , H03F3/193
摘要： A predistortion method for CMOS Low-Noise-Amplifiers (LNAs) to be used in Broadband Wireless applications is presented. The method is based on the nulling of the third order Intermodulation distortion (IMD3) of the main amplifier by a highly nonlinear predistortion branch. Maximum third order product cancellation is ensured by a transformer feedback method. The technique improves linearity in a wide range of input power without significant gain and Noise Figure (NF) degradation. Simulation results on a 1-V LNA indicate a 10.3 dB improvement in the Input Third-Order Intercept Point (IIP3) with a reduction of only 1 dB and 0.44 dB in amplifier gain and NF respectively.
摘要翻译： 提出了一种用于宽带无线应用的CMOS低噪声放大器（LNA）的预失真方法。 该方法基于通过高度非线性预失真分支对主放大器的三阶互调失真（IMD3）的归零。 通过变压器反馈方法确保最大三阶乘积消除。 该技术在宽范围的输入功率下提高了线性度，而没有显着增益和噪声系数（NF）降级。 1-V LNA的仿真结果表明，输入三阶截取点（IIP3）的增益为10.3 dB，放大器增益和NF分别仅降低了1 dB和0.44 dB。
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公开(公告)号：US20070290745A1
公开(公告)日：2007-12-20
申请号：US11803509
申请日：2007-05-14
IPC分类号： H03F1/36
CPC分类号： H03F3/193 , H03F1/26 , H03F1/347 , H03F3/195 , H03F3/45183 , H03F2200/294 , H03F2200/391 , H03F2200/451 , H03F2200/537 , H03F2203/45386 , H03F2203/45644 , H03F2203/45704
摘要： A low-noise amplifier, that utilizes multiple monolithic transformer magnetic feedback to simultaneously neutralize the gate-drain overlap capacitance of the amplifying transistor and achieve high gain at high frequencies when driving an on-chip capacitance, is shown. The multiple transformer topology permits negative and positive feedback to be applied constructively, allowing for a stable design with adequate gain and large reverse isolation without Noise Figure degradation.
摘要翻译： 一种低噪声放大器，利用多个单片变压器磁反馈来同时中和放大晶体管的栅 - 漏重叠电容，并在驱动片上电容时在高频下实现高增益。 多重变压器拓扑允许建设性地施加负反馈和正反馈，允许具有足够增益和大反向隔离的稳定设计，而没有噪声系数降级。
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公开(公告)号：US08183970B2
公开(公告)日：2012-05-22
申请号：US12897446
申请日：2010-10-04
申请人： Yannis Papananos
发明人： Yannis Papananos
IPC分类号： H01F5/00
CPC分类号： H01F27/2804 , H01F17/0013 , H01F2017/0086 , H01F2027/2809 , H01L23/5227 , H01L2924/0002 , H03H7/42 , H03H2001/0064 , Y10T29/4902 , Y10T29/49071 , Y10T29/49073 , H01L2924/00
摘要： Integrated high frequency balanced-to-unbalanced transformers and inductors suitable for operation in high frequencies, such as radio frequencies. Embodiments disclosed give consideration to issues related to the layout of the top and bottom inductors for the minimization of capacitive effects between layers and methods of manufacturing thereof. A displacement between the conductive paths of the top inductor and the bottom inductor is shown that provides for superior performance over prior art solutions.
摘要翻译： 集成的高频平衡至不平衡变压器和电感器，适用于高频操作，如无线电频率。 所公开的实施例考虑了用于最小化层之间的电容效应的顶部和底部电感器的布局的相关问题及其制造方法。 示出了顶部电感器和底部电感器的导电路径之间的位移，其提供优于现有技术解决方案的优异性能。
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公开(公告)号：US07808356B2
公开(公告)日：2010-10-05
申请号：US11821313
申请日：2007-06-22
申请人： Yannis Papananos
发明人： Yannis Papananos
IPC分类号： H01F5/00
CPC分类号： H01F27/2804 , H01F17/0013 , H01F2017/0086 , H01F2027/2809 , H01L23/5227 , H01L2924/0002 , H03H7/42 , H03H2001/0064 , Y10T29/4902 , Y10T29/49071 , Y10T29/49073 , H01L2924/00
摘要： Integrated high frequency balanced-to-unbalanced transformers and inductors suitable for operation in high frequencies, such as radio frequencies. Embodiments disclosed give consideration to issues related to the layout of the top and bottom inductors for the minimization of capacitive effects between layers. A displacement between the conductive paths of the top inductor and the bottom inductor is shown that provides for superior performance over prior art solutions.
摘要翻译： 集成的高频平衡至不平衡变压器和电感器，适用于高频操作，如无线电频率。 所公开的实施例考虑了用于最小化层之间的电容效应的顶部和底部电感器的布局相关的问题。 示出了顶部电感器和底部电感器的导电路径之间的位移，其提供优于现有技术解决方案的优异性能。
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公开(公告)号：US07253712B1
公开(公告)日：2007-08-07
申请号：US11208979
申请日：2005-08-22
申请人： Yannis Papananos
发明人： Yannis Papananos
IPC分类号： H01F5/00
CPC分类号： H01F27/2804 , H01F17/0013 , H01F2017/0086 , H01F2027/2809 , H01L23/5227 , H01L2924/0002 , H03H7/42 , H01L2924/00
摘要： Integrated high frequency balanced-to-unbalanced transformers suitable for operation in high frequencies, such as radio frequencies. Embodiments disclosed give consideration to issues related to the layout of the primary and secondary inductors for the minimization of capacitive effects between layers while using a minimal number of metal layers. Two solutions are provided, one having embodiments with a symmetrical primary inductor in a 4-metal layer implementation and one having embodiments with a non-symmetrical primary inductor in a 3-metal layer implementation.
摘要翻译： 集成的高频平衡至不平衡变压器，适用于高频，如无线电频率。 所公开的实施例考虑到与使用最少数量的金属层时最小化层之间的电容效应的主电感器和次级电感器的布局相关的问题。 提供了两个解决方案，一个具有在4-金属层实现中具有对称初级电感器的实施例，并且具有在3-金属层实现中具有非对称初级电感器的实施例的实施例。
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公开(公告)号：US08505193B2
公开(公告)日：2013-08-13
申请号：US13473368
申请日：2012-05-16
申请人： Yannis Papananos
发明人： Yannis Papananos
IPC分类号： H01F7/06
CPC分类号： H01F27/2804 , H01F17/0013 , H01F2017/0086 , H01F2027/2809 , H01L23/5227 , H01L2924/0002 , H03H7/42 , H03H2001/0064 , Y10T29/4902 , Y10T29/49071 , Y10T29/49073 , H01L2924/00
摘要： Integrated high frequency balanced-to-unbalanced transformers and inductors suitable for operation in high frequencies, such as radio frequencies. Embodiments disclosed give consideration to issues related to the layout of the top and bottom inductors for the minimization of capacitive effects between layers and methods of manufacturing thereof. The manufacturing process comprises forming of a first winding in a first metal layer; forming an insulating layer over at least the first metal layer; forming of a second winding in a second metal layer such that the second winding path has both a vertical and a horizontal displacement to the first conductive path, preferably with an overlap that is less than a full overlap; and forming shunts to ensure continuity of each of the first and second windings.
摘要翻译： 集成的高频平衡至不平衡变压器和电感器，适用于高频操作，如无线电频率。 所公开的实施例考虑了用于最小化层之间的电容效应的顶部和底部电感器的布局的相关问题及其制造方法。 制造工艺包括在第一金属层中形成第一绕组; 在至少第一金属层上形成绝缘层; 在第二金属层中形成第二绕组，使得第二绕组路径具有与第一导电路径的垂直和水平位移，优选地具有小于完全重叠的重叠; 以及形成分流器以确保第一和第二绕组中的每一个的连续性。
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