公开(公告)号：US08514021B2

公开(公告)日：2013-08-20

申请号：US13271630

申请日：2011-10-12

申请人： Jari Johannes Heikkinen ,  Jonne Juhani Riekki ,  Jouni Kristian Kaukovuori

发明人： Jari Johannes Heikkinen ,  Jonne Juhani Riekki ,  Jouni Kristian Kaukovuori

IPC分类号： H03F3/45

CPC分类号： H03F3/45188 ,  H03F1/565 ,  H03F3/195 ,  H03F3/211 ,  H03F3/45179 ,  H03F2200/294 ,  H03F2203/45306 ,  H03F2203/45386 ,  H03F2203/45704 ,  Y10T29/49002

摘要： Embodiments of the invention are concerned with configurable RFICs. In an exemplary embodiment there is provided a configurable radio-frequency integrated circuit (RFIC) including one or more configurable low noise amplifier circuits, each of said one or more configurable low noise amplifier circuits being configurable between: an internal input impedance matching topology in which the respective low noise amplifier circuit includes one or more internal input impedance matching components adapted to match the input impedance of the respective low noise amplifier to a given input, said one or more internal input impedance matching components being located internally to the respective low noise amplifier circuit; and a topology different from said internal input impedance matching topology.

摘要翻译： 本发明的实施例涉及可配置的RFIC。 在示例性实施例中，提供了包括一个或多个可配置低噪声放大器电路的可配置射频集成电路（RFIC），所述一个或多个可配置低噪声放大器电路中的每一个可配置在：内部输入阻抗匹配拓扑，其中 相应的低噪声放大器电路包括一个或多个内部输入阻抗匹配部件，其适于将各个低噪声放大器的输入阻抗与给定输入相匹配，所述一个或多个内部输入阻抗匹配部件位于各自的低噪声放大器内部 电路 以及与所述内部输入阻抗匹配拓扑不同的拓扑。

公开(公告)号：US08098101B2

公开(公告)日：2012-01-17

申请号：US12169559

申请日：2008-07-08

申请人： Anup Savla ,  Roger Brockenbrough

发明人： Anup Savla ,  Roger Brockenbrough

IPC分类号： H03F3/04

CPC分类号： H03F3/45188 ,  H03F3/193 ,  H03F2203/45644 ,  H03F2203/45704

摘要： According to some embodiments, an apparatus may comprise an amplifier, wherein the amplifier comprises: an output stage formed of a positive output terminal providing a positive output voltage and a negative output terminal providing a negative output voltage; a load tank coupled in parallel with the output stage and configured to filter signals received at the amplifier; and a negative resistance block coupled in parallel with the output stage and the load tank.

摘要翻译： 根据一些实施例，装置可以包括放大器，其中放大器包括：由提供正输出电压的正输出端子和提供负输出电压的负输出端子形成的输出级; 负载箱，与所述输出级并联耦合，并被配置为滤波在所述放大器处接收的信号; 以及与输出级和负载箱并联耦合的负电阻块。

公开(公告)号：US07999621B2

公开(公告)日：2011-08-16

申请号：US12686161

申请日：2010-01-12

申请人： Seyed-Ali Hajimiri ,  Scott D. Kee ,  Ichiro Aoki

发明人： Seyed-Ali Hajimiri ,  Scott D. Kee ,  Ichiro Aoki

IPC分类号： H03F3/04

CPC分类号： H03F1/0211 ,  H03F3/04 ,  H03F3/191 ,  H03F3/217 ,  H03F3/2176 ,  H03F3/45475 ,  H03F3/605 ,  H03F3/68 ,  H03F2200/507 ,  H03F2200/537 ,  H03F2200/541 ,  H03F2203/45464 ,  H03F2203/45704 ,  H03F2203/45731

摘要： A cross-differential amplifier is provided. The cross-differential amplifier includes an inductor connected to a direct current power source at a first terminal. A first and second switch, such as transistors, are connected to the inductor at a second terminal. A first and second amplifier are connected at their supply terminals to the first and second switch. The first and second switches are operated to commutate the inductor between the amplifiers so as to provide an amplified signal while limiting the ripple voltage on the inductor and thus limiting the maximum voltage imposed across the amplifiers and switches.

摘要翻译： 提供了一个交叉差分放大器。 交叉差分放大器包括在第一端子处连接到直流电源的电感器。 诸如晶体管的第一和第二开关在第二端子连接到电感器。 第一和第二放大器在其电源端连接到第一和第二开关。 第一和第二开关被操作以在放大器之间换向电感器，以便提供放大的信号，同时限制电感器上的纹波电压，从而限制放大器和开关上施加的最大电压。

公开(公告)号：US07973603B2

公开(公告)日：2011-07-05

申请号：US12493034

申请日：2009-06-26

申请人： Abhishek V. Kammula ,  Aslamali A. Rafi ,  George Tyson Tuttle

发明人： Abhishek V. Kammula ,  Aslamali A. Rafi ,  George Tyson Tuttle

IPC分类号： H03G3/10

CPC分类号： H04N5/455 ,  H03F3/45179 ,  H03F3/68 ,  H03F2203/45306 ,  H03F2203/45311 ,  H03F2203/45352 ,  H03F2203/45386 ,  H03F2203/45394 ,  H03F2203/45396 ,  H03F2203/45621 ,  H03F2203/45704 ,  H03G1/0029 ,  H04N21/4382

摘要： A low-noise amplifier includes a first resistor that receives a first signal of a differential input signal, and a second resistor that receives a second signal of the differential input signal. The amplifier includes a first transconductance device coupled to the first resistor that provides a first signal of a differential output signal, and a second transconductance device coupled to the second resistor, that provides a second signal of the differential output signal. The receiver also includes a first capacitor coupled between the first resistor input and a control electrode on the second transconductance device, and a second capacitor coupled between the second resistor input and a control electrode on the first transconductance device. The low-noise amplifier can include additional gain stages.

摘要翻译： 低噪声放大器包括接收差分输入信号的第一信号的第一电阻器和接收差分输入信号的第二信号的第二电阻器。 放大器包括耦合到第一电阻器的第一跨导器件，其提供差分输出信号的第一信号，以及耦合到第二电阻器的第二跨导器件，其提供差分输出信号的第二信号。 接收器还包括耦合在第一电阻器输入端和第二跨导器件上的控制电极之间的第一电容器，以及耦合在第二电阻器输入端和第一跨导器件上的控制电极之间的第二电容器。 低噪声放大器可以包括额外的增益级。

公开(公告)号：US07919985B2

公开(公告)日：2011-04-05

申请号：US12368934

申请日：2009-02-10

申请人： Michael M. Green

发明人： Michael M. Green

IPC分类号： H03K19/094

CPC分类号： H03F1/42 ,  H03F3/45183 ,  H03F3/72 ,  H03F2200/36 ,  H03F2203/45506 ,  H03F2203/45631 ,  H03F2203/45638 ,  H03F2203/45702 ,  H03F2203/45704 ,  H03F2203/7203 ,  H03K17/04163 ,  H03K17/693 ,  H03K19/01707 ,  H03K19/09432

摘要： Various circuit techniques for implementing ultra high speed circuits use current-controlled CMOS (C3MOS) logic with inductive broadbanding fabricated in conventional CMOS process technology. Optimum balance between power consumption and speed for each circuit application is achieved by combining high speed C3MOS logic with inductive broadbanding/C3MOS logic with low power conventional CMOS logic. The combined C3MOS logic with inductive broadbanding/C3MOS/CMOS logic allows greater integration of circuits such as high speed transceivers used in fiber optic communication systems.

摘要翻译： 用于实现超高速电路的各种电路技术使用以常规CMOS工艺技术制造的感应宽带的电流控制CMOS（C3MOS）逻辑。 通过将高速C3MOS逻辑与感应宽带/ C3MOS逻辑与低功耗常规CMOS逻辑相结合，实现了每个电路应用的功耗和速度之间的最佳平衡。 具有感应宽带/ C3MOS / CMOS逻辑的组合C3MOS逻辑允许更多地集成诸如光纤通信系统中使用的高速收发器之类的电路。

公开(公告)号：US07671685B2

公开(公告)日：2010-03-02

申请号：US11694266

申请日：2007-03-30

申请人： Yuyu Chang

发明人： Yuyu Chang

IPC分类号： H03F3/04

CPC分类号： H03F3/193 ,  H03F1/223 ,  H03F1/26 ,  H03F3/45179 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2203/45166 ,  H03F2203/45668 ,  H03F2203/45704

摘要： Aspects of a method and system for a low power fully differential noise canceling low noise amplifier (NC LNA) are provided. The NC LNA may receive signals via a single ended input and may generate an amplified symmetric differential output from the received signals. The NC LNA may utilize capacitor dividers, such as a capacitor bank, in the single ended input in order to provide impedance transformation that enables low power operation and matching to an input port. The NC LNA may generate one portion of the amplified symmetric differential output via a voltage divider, which may comprise a plurality of capacitors, such as a capacitor bank. The NC LNA may be implemented utilizing one or more circuits.

摘要翻译： 提供了低功耗全差分噪声消除低噪声放大器（NC LNA）的方法和系统的方面。 NC LNA可以经由单端输入接收信号，并且可以从接收到的信号产生放大的对称差分输出。 NC LNA可以在单端输入中使用诸如电容器组的电容器分配器，以便提供能够进行低功率操作和与输入端口匹配的阻抗变换。 NC LNA可以经由分压器产生放大的对称差分输出的一部分，分压器可以包括多个电容器，例如电容器组。 NC LNA可以利用一个或多个电路来实现。

公开(公告)号：US07276970B2

公开(公告)日：2007-10-02

申请号：US11131281

申请日：2005-05-18

申请人： Haideh Khorramabadi

发明人： Haideh Khorramabadi

IPC分类号： H03F3/45

CPC分类号： H03L7/23 ,  H01F17/0006 ,  H01F17/0013 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/364 ,  H03B2201/025 ,  H03B2201/0266 ,  H03D7/161 ,  H03D7/18 ,  H03F1/3211 ,  H03F1/52 ,  H03F3/191 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/45475 ,  H03F2200/294 ,  H03F2203/45318 ,  H03F2203/45704 ,  H03G1/0029 ,  H03H11/1291 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L1/023 ,  H03L7/10 ,  H03L7/18 ,  H01L2924/00

摘要： An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit. A receiver front end provides programable attenuation and a programable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. The filters incorporate a gain stage that provides improved dynamic range through the use of cross coupled auxiliary differential pair CMOS amplifiers to cancel distortion in a main linearized differential pair amplifier. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically. A differential crystal oscillator provides a frequency reference. Differential signal transmission throughout the receiver is used. ESD protection is provided by a pad ring and ESD clamping structure. Shunts utilize a gate boosting at each pin to discharge ESD build up. An IF VGA utilizes distortion cancellation achieved with cross coupled differential pair amplifiers having their Vds dynamically modified in conjunction with current steering of the differential pairs sources.

摘要翻译： 具有通道选择和图像抑制的集成接收器基本上在单个CMOS集成电路上实现。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 与图像抑制混合器一起集成到衬底上的LC滤波器提供图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 有源滤波器利用具有屏蔽的多轨螺旋电感器来增加电路Q.滤波器包括增益级，其通过使用交叉耦合辅助差分对CMOS放大器来消除主线性化差分对放大器中的失真而提供改进的动态范围。 频率规划提供额外的镜像抑制。 本地振荡器信号产生方法在芯片上减少失真。 PLL产生所需的带外LO信号。 直接合成产生带内LO信号。 PLL VCO自动居中。 差分晶体振荡器提供频率参考。 使用整个接收机的差分信号传输。 ESD保护由衬垫环和ESD夹紧结构提供。 分流器利用每个引脚上的门极升压来放电ESD积聚。 IF VGA利用交叉耦合的差分对放大器实现的失真消除，其具有与差分对源的当前转向结合动态修改的V ds。

公开(公告)号：US20070188240A1

公开(公告)日：2007-08-16

申请号：US11726988

申请日：2007-03-22

申请人： Steven Roach

发明人： Steven Roach

IPC分类号： H03F3/191

CPC分类号： H03F1/223 ,  H03F1/42 ,  H03F1/565 ,  H03F3/191 ,  H03F3/193 ,  H03F3/45183 ,  H03F3/45188 ,  H03F2200/36 ,  H03F2200/447 ,  H03F2203/45638 ,  H03F2203/45691 ,  H03F2203/45704 ,  H03F2203/45712

摘要： Circuitry and methods for improved amplifiers with large bandwidth and constant gain are provided. The combination of a synthetic inductive drain load and a bridged-T matching network provide amplifiers that can drive a substantial capacitive load with the above mentioned improvements over prior amplifiers. Additionally, circuits presented allow for improved rise time and insensitivity to temperature variations.

摘要翻译： 提供了具有大带宽和恒定增益的改进放大器的电路和方法。 合成感应漏极负载和桥接T匹配网络的组合提供了放大器，可以通过先前的放大器上述改进来驱动大量的容性负载。 此外，所呈现的电路允许改善上升时间和对温度变化的不敏感性。

公开(公告)号：US20070132511A1

公开(公告)日：2007-06-14

申请号：US11657773

申请日：2007-01-24

申请人： Jussi Ryynanen ,  Jarkko Jussila

发明人： Jussi Ryynanen ,  Jarkko Jussila

IPC分类号： H03F3/45

CPC分类号： H03F3/45089 ,  H03F3/45085 ,  H03F2200/372 ,  H03F2203/45364 ,  H03F2203/45396 ,  H03F2203/45464 ,  H03F2203/45704 ,  H03G1/0023 ,  H03G1/0088

摘要： The present invention relates to a method and circuit arrangement for adjusting a gain, wherein said circuit arrangement comprises at least a first output branch connected to a first load and a second output branch connected to a second load. The gain control function is realized based on a current splitting, wherein a non-operated output branch is used as a kind of dummy branch for receiving a part of the output current. Thus, only as many output branches as there are outputs are required to implement a gain control based on splitting. Thereby, a complexity of the layout design is reduced and control and biasing of dummy branches is not required.

摘要翻译： 本发明涉及一种用于调整增益的方法和电路装置，其中所述电路装置至少包括连接到第一负载的第一输出支路和连接到第二负载的第二输出支路。 增益控制功能基于电流分配实现，其中非操作输出分支用作接收一部分输出电流的一种虚拟分支。 因此，只需要有与输出一样多的输出分支来实现基于分割的增益控制。 因此，布局设计的复杂性降低，并且不需要虚拟分支的控制和偏置。

公开(公告)号：US07202748B2

公开(公告)日：2007-04-10

申请号：US11518027

申请日：2006-09-08

申请人： Steven D. Roach

发明人： Steven D. Roach

IPC分类号： H03F3/04

CPC分类号： H03F1/223 ,  H03F1/42 ,  H03F1/565 ,  H03F3/191 ,  H03F3/193 ,  H03F3/45183 ,  H03F3/45188 ,  H03F2200/36 ,  H03F2200/447 ,  H03F2203/45638 ,  H03F2203/45691 ,  H03F2203/45704 ,  H03F2203/45712

摘要： Circuitry and methods for improved amplifiers with large bandwidth and constant gain are provided. The combination of a synthetic inductive drain load and a bridged-T matching network provide amplifiers that can drive a substantial capacitive load with the above mentioned improvements over prior amplifiers. Additionally, circuits presented allow for improved rise time and insensitivity to temperature variations.

摘要翻译： 提供了具有大带宽和恒定增益的改进放大器的电路和方法。 合成感应漏极负载和桥接T匹配网络的组合提供了放大器，可以通过先前的放大器上述改进来驱动大量的容性负载。 此外，所呈现的电路允许改善上升时间和对温度变化的不敏感性。