公开(公告)号：US20110272815A1

公开(公告)日：2011-11-10

申请号：US13013442

申请日：2011-01-25

申请人： Akio Misaka ,  Yasuko Tabata ,  Hideyuki Arai ,  Takayuki Yamada

发明人： Akio Misaka ,  Yasuko Tabata ,  Hideyuki Arai ,  Takayuki Yamada

IPC分类号： H01L23/528 ,  G06F17/50

CPC分类号： H01L23/528 ,  G06F17/50 ,  G06F17/5072 ,  G06F2217/12 ,  H01L23/522 ,  H01L2924/0002 ,  Y02P90/265 ,  H01L2924/00

摘要： A semiconductor device includes: a plurality of line features including at least one real feature which includes a gate electrode portion, and at least one dummy feature. Two of multiple ones of the dummy feature, and at least one of the line features interposed between the two dummy features and including the at least one real feature form parallel running line features which are evenly spaced. The parallel running line features have an identical width, and line end portions of the parallel running line features are substantially flush. Line end portion uniformization dummy features are formed on extensions of the line end portions of the parallel running line features. The line end portion uniformization dummy features include a plurality of linear features each having a same width as each of the line features and spaced at intervals equal to an interval between each adjacent pair of the line features.

摘要翻译： 半导体器件包括：多个线特征，包括至少一个实际特征，其包括栅电极部分和至少一个虚拟特征。 两个虚拟特征中的两个，并且插入在两个虚拟特征之间并且包括至少一个真实特征的线特征中的至少一个形成均匀间隔的并行运行线特征。 平行运行线特征具有相同的宽度，并行运行线特征的线端部分基本齐平。 线端部均匀化虚拟特征形成在平行运行线特征的线端部的延伸部上。 线端部均匀化虚拟特征包括多个线性特征，每个线性特征具有与每个线特征相同的宽度，并以等于每对相邻线特征之间的间隔的间隔间隔开。

公开(公告)号：US08392856B2

公开(公告)日：2013-03-05

申请号：US13013442

申请日：2011-01-25

申请人： Akio Misaka ,  Yasuko Tabata ,  Hideyuki Arai ,  Takayuki Yamada

发明人： Akio Misaka ,  Yasuko Tabata ,  Hideyuki Arai ,  Takayuki Yamada

IPC分类号： G06F17/50

CPC分类号： H01L23/528 ,  G06F17/50 ,  G06F17/5072 ,  G06F2217/12 ,  H01L23/522 ,  H01L2924/0002 ,  Y02P90/265 ,  H01L2924/00

摘要： A semiconductor device includes: a plurality of line features including at least one real feature which includes a gate electrode portion, and at least one dummy feature. Two of multiple ones of the dummy feature, and at least one of the line features interposed between the two dummy features and including the at least one real feature form parallel running line features which are evenly spaced. The parallel running line features have an identical width, and line end portions of the parallel running line features are substantially flush. Line end portion uniformization dummy features are formed on extensions of the line end portions of the parallel running line features. The line end portion uniformization dummy features include a plurality of linear features each having a same width as each of the line features and spaced at intervals equal to an interval between each adjacent pair of the line features.

摘要翻译： 半导体器件包括：多个线特征，包括至少一个实际特征，其包括栅电极部分和至少一个虚拟特征。 两个虚拟特征中的两个，并且插入在两个虚拟特征之间并且包括至少一个真实特征的线特征中的至少一个形成均匀间隔的并行运行线特征。 平行运行线特征具有相同的宽度，并行运行线特征的线端部分基本齐平。 线端部均匀化虚拟特征形成在平行运行线特征的线端部的延伸部上。 线端部均匀化虚拟特征包括多个线性特征，每个线性特征具有与每个线特征相同的宽度，并以等于每对相邻线特征之间的间隔间隔。

公开(公告)号：US20110278679A1

公开(公告)日：2011-11-17

申请号：US13014346

申请日：2011-01-26

申请人： Yasuko Tabata ,  Akio Misaka ,  Takehiro Hirai ,  Hideyuki Arai ,  Yuji Nonami

发明人： Yasuko Tabata ,  Akio Misaka ,  Takehiro Hirai ,  Hideyuki Arai ,  Yuji Nonami

IPC分类号： H01L27/088 ,  G03F1/00 ,  G06F17/50

CPC分类号： G06F17/5068 ,  G03F1/36 ,  G03F1/38 ,  H01L21/28123 ,  H01L21/31144 ,  H01L21/32139 ,  H01L27/0207

摘要： A semiconductor device includes a circuit portion including at least one real feature, and a plurality of dummy feature groups each including a plurality of dummy features spaced apart from each other by a first distance. The plurality of dummy feature groups are spaced apart from each other by a second distance larger than the first distance, and the circuit portion and the plurality of dummy feature groups are spaced apart from each other by the second distance.

摘要翻译： 半导体器件包括包括至少一个实际特征的电路部分和多个虚拟特征组，每个虚拟特征组包括彼此间隔开第一距离的多个虚拟特征。 多个虚拟特征组彼此间隔开大于第一距离的第二距离，并且电路部分和多个虚拟特征组彼此间隔开第二距离。

公开(公告)号：US06791668B2

公开(公告)日：2004-09-14

申请号：US10216878

申请日：2002-08-13

申请人： Kao-Tsair Tsai ,  Yasuko Tabata

发明人： Kao-Tsair Tsai ,  Yasuko Tabata

IPC分类号： G03B2772

CPC分类号： G03F7/70941 ,  G03F7/70716

摘要： A semiconductor apparatus and method for upgrading uniformity of critical dimension by compensating the flare effect at wafer edge are disclosed. In one embodiment of the invention, the invention uses an exposure plate mounted on tilt pincettes which can protrude and retract from a wafer stage of a stepper to eliminate the alteration of uniformity of critical dimension at wafer edge. The exposure plate uses the tilt pincettes to tilt along with a wafer so as to keep planar with the wafer.

公开(公告)号：US08330248B2

公开(公告)日：2012-12-11

申请号：US13014346

申请日：2011-01-26

申请人： Yasuko Tabata ,  Akio Misaka ,  Takehiro Hirai ,  Hideyuki Arai ,  Yuji Nonami

发明人： Yasuko Tabata ,  Akio Misaka ,  Takehiro Hirai ,  Hideyuki Arai ,  Yuji Nonami

IPC分类号： H01L31/23

CPC分类号： G06F17/5068 ,  G03F1/36 ,  G03F1/38 ,  H01L21/28123 ,  H01L21/31144 ,  H01L21/32139 ,  H01L27/0207

摘要： A semiconductor device includes a circuit portion including at least one real feature, and a plurality of dummy feature groups each including a plurality of dummy features spaced apart from each other by a first distance. The plurality of dummy feature groups are spaced apart from each other by a second distance larger than the first distance, and the circuit portion and the plurality of dummy feature groups are spaced apart from each other by the second distance.

摘要翻译： 半导体器件包括包括至少一个实际特征的电路部分和多个虚拟特征组，每个虚拟特征组包括彼此间隔开第一距离的多个虚拟特征。 多个虚拟特征组彼此间隔开大于第一距离的第二距离，并且电路部分和多个虚拟特征组彼此间隔开第二距离。

公开(公告)号：US5994004A

公开(公告)日：1999-11-30

申请号：US19743

申请日：1998-02-06

申请人： Yasuko Tabata ,  Satoru Asai ,  Toshimi Ikeda ,  Masato Matsumiya

发明人： Yasuko Tabata ,  Satoru Asai ,  Toshimi Ikeda ,  Masato Matsumiya

IPC分类号： G03F1/30 ,  G03F1/68 ,  H01L21/027 ,  G03F9/00

CPC分类号： G03F1/30

摘要： A photomask has a plurality of transparent regions defined in an opaque region and classified into first and second groups. Each of the transparent regions belonging to one of the first and second groups is provided with a phase shifter, so that the phase of light transmitted through the transparent region belonging to the first group becomes different from the phase of light transmitted through the transparent region belonging to the second group. The photomask includes: a pair of first transparent regions belonging to the first group and including linear portions disposed in parallel, a virtual straight line interconnecting one ends of the first transparent regions intersecting at a right angle with the extension direction of the linear portions; and a second transparent region belonging to the second group and disposed at the center between, and in parallel to, the linear portions of the pair of first transparent regions, the second transparent region including a linear thickportion and a linear thin portion, the linear thin portion being disposed in an area between the pair of first transparent regions and continuously coupled to the linear thick portion, and a connection portion between the thick and thin portions being indented from the virtual straight line toward the area between the pair of first transparent regions.

摘要翻译： 光掩模具有限定在不透明区域中并被分类为第一和第二组的多个透明区域。 属于第一组和第二组中的一个的透明区域中的每一个设置有移相器，使得透过属于第一组的透明区域的光的相位与透过透明区域的光的相位不同 到第二组。 光掩模包括：属于第一组的一对第一透明区域，并且包括平行设置的直线部分，将与直线部分的延伸方向成直角相交的第一透明区域的一端相互连接的虚拟直线; 以及属于第二组的第二透明区域，并且设置在一对第一透明区域的直线部分之间并且平行于中心，第二透明区域包括线性​​厚度部分和线状薄部分，线性薄片 部分设置在一对第一透明区域之间的区域中并且连续地连接到线状厚部分，并且厚部分和薄部分之间的连接部分从假想直线向着该对第一透明区域之间的区域缩进。

公开(公告)号：US5472813A

公开(公告)日：1995-12-05

申请号：US274689

申请日：1994-07-14

申请人： Kenji Nakagawa ,  Masao Kanazawa ,  Tamae Haruki ,  Yasuko Tabata

发明人： Kenji Nakagawa ,  Masao Kanazawa ,  Tamae Haruki ,  Yasuko Tabata

IPC分类号： G03F1/00 ,  G03F7/00 ,  G03F7/20 ,  G03F9/00

CPC分类号： G03F1/34 ,  G03F1/26 ,  G03F1/70 ,  G03F7/0035 ,  G03F7/2022 ,  G03F7/70283 ,  G03F7/70466

摘要： A pattern exposing method forms a predetermined resist pattern on a substrate by exposing a first resist layer which is formed on the substrate using a first reticle which includes a first pattern for exposing a first corresponding pattern on the first resist layer by use of a phase shift of light transmitted through the first reticle, developing the exposed first resist layer, exposing a second resist layer which is formed on the entire surface of the substrate, including a top of the first resist layer, using a second reticle which has a second pattern for exposing a second corresponding pattern on the second resist layer by use of light transmitted through the second reticle, where the second corresponding pattern overlaps at least a part of the first corresponding pattern, and developing the second resist layer so that a part of the first corresponding pattern is removed by the second corresponding pattern and the predetermined resist pattern is formed.

摘要翻译： 图案曝光方法通过使用第一掩模版曝光形成在衬底上的第一抗蚀剂层而在衬底上形成预定的抗蚀剂图案，第一掩模版包括通过使用相移在第一抗蚀剂层上曝光第一对应图案的第一图案 透射通过第一掩模版的光，显影曝光的第一抗蚀剂层，使用具有第二图案的第二掩模版露出形成在包括第一抗蚀剂层的顶部的基板的整个表面上的第二抗蚀剂层， 通过使用透射通过第二掩模版的光在第二抗蚀剂层上曝光第二对应图案，其中第二对应图案与第一对应图案的至少一部分重叠，并且显影第二抗蚀剂层，使得第一对应图案的一部分 通过第二对应图案去除图案，并且形成预定的抗蚀剂图案。

公开(公告)号：US5364716A

公开(公告)日：1994-11-15

申请号：US940408

申请日：1992-09-03

申请人： Kenji Nakagawa ,  Masao Kanazawa ,  Tamae Haruki ,  Yasuko Tabata

发明人： Kenji Nakagawa ,  Masao Kanazawa ,  Tamae Haruki ,  Yasuko Tabata

IPC分类号： G03F1/00 ,  G03F7/00 ,  G03F7/20 ,  G03F9/00

CPC分类号： G03F1/34 ,  G03F1/26 ,  G03F1/70 ,  G03F7/0035 ,  G03F7/2022 ,  G03F7/70283 ,  G03F7/70466

摘要： A pattern exposing method forms a predetermined resist pattern on a substrate by exposing a first resist layer which is formed on the substrate using a first reticle which includes a first pattern for exposing a first corresponding pattern on the first resist layer by use of a phase shift of light transmitted through the first reticle, developing the exposed first resist layer, exposing a second resist layer which is formed on the entire surface of the substrate, including a top of the first resist layer, using a second reticle which has a second pattern for exposing a second corresponding pattern on the second resist layer by use of light transmitted through the second reticle, where the second corresponding pattern overlaps at least a part of the first corresponding pattern, and developing the second resist layer so that a part of the first corresponding pattern is removed by the second corresponding pattern and the predetermined resist pattern is formed.

摘要翻译： 图案曝光方法通过使用第一掩模版曝光形成在衬底上的第一抗蚀剂层而在衬底上形成预定的抗蚀剂图案，第一掩模版包括通过使用相移在第一抗蚀剂层上曝光第一对应图案的第一图案 透射通过第一掩模版的光，显影曝光的第一抗蚀剂层，使用具有第二图案的第二掩模版露出形成在包括第一抗蚀剂层的顶部的基板的整个表面上的第二抗蚀剂层， 通过使用透射通过第二掩模版的光在第二抗蚀剂层上曝光第二对应图案，其中第二对应图案与第一对应图案的至少一部分重叠，并且显影第二抗蚀剂层，使得第一对应图案的一部分 通过第二对应图案去除图案，并且形成预定的抗蚀剂图案。