公开(公告)号：US06312614B1

公开(公告)日：2001-11-06

申请号：US09577883

申请日：2000-05-25

申请人： Yoshio Arimitsu ,  Yutaka Kaneda

发明人： Yoshio Arimitsu ,  Yutaka Kaneda

IPC分类号： H01L2100

CPC分类号： H05K3/242 ,  H01L21/4846 ,  H01L23/4985 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K3/064 ,  H05K3/28 ,  H05K2203/0571 ,  H05K2203/058 ,  H05K2203/0588 ,  H01L2924/00

摘要： A semiconductor element mounting interposer is produced by (A) forming a conducting circuit that comprises motherboard connecting electrodes 2 and plated leads 3 on an insulating base film 1; (B) forming a patterning resin layer 5 over the conducting circuit 4; (C) etching patterning resin layer 5 so as to expose the motherboard connecting electrodes 2 and plated leads 3; (D) masking plated leads 3 with an electroplating resist layer 6; (E) depositing an electroplated metal layer 7 over the exposed motherboard connecting electrodes 2; (F) removing the electroplating resist layer 6; (G) removing the exposed plated leads 3 through etching; and (H) where the patterning resin layer 5 is a polyimide precursor layer, bringing about complete imidation of the polyimide precursor layer.

摘要翻译： 通过（A）在绝缘基膜1上形成包括母板连接电极2和电镀引线3的导电电路来制造半导体元件安装插入件; （B）在导电电路4上形成图案化树脂层5; （C）蚀刻图形化树脂层5，以使母板连接电极2和电镀引线3露出; （D）用电镀抗蚀剂层6对电镀引线3进行掩模; （E）在暴露的母板连接电极2上沉积电镀金属层7; （F）去除电镀抗蚀剂层6; （G）通过蚀刻去除暴露的电镀引线3; 和（H），其中图案形成树脂层5是聚酰亚胺前体层，使聚酰亚胺前体层完全酰化。