公开(公告)号：US07893980B2

公开(公告)日：2011-02-22

申请号：US11571436

申请日：2005-06-30

Applicant: Youn Jung Lee ,  Jae Soon Hwang ,  Hun Joon Jung

Inventor： Youn Jung Lee ,  Jae Soon Hwang ,  Hun Joon Jung

IPC: H04N3/14

CPC classification number: H04N5/3765

Abstract: Disclosed herein is a Complementary Metal-Oxide-Silicon (CMOS) image sensor. The image sensor includes a two-dimensional pixel array composed of unit pixels, each unit pixel having a photo diode and transistors, a row decoder located at an end of the pixel array to assign row addresses, and a column decoder located at another end of the pixel array, which is erpendicular to the row decoder, to assign column addresses to corresponding pixels in rows selected by the row decoder. The row decoder allows the integration time points of the unit pixels, which are included in the pixel array, to be identical. Accordingly, the distortion of images can be prevented.

Abstract translation: 本文公开了互补金属氧化物 - 硅（CMOS）图像传感器。 图像传感器包括由单位像素组成的二维像素阵列，每个单位像素具有光电二极管和晶体管，位于像素阵列的末端以分配行地址的行解码器和位于另一端的列解码器 垂直于行解码器的像素阵列将列地址分配给由行解码器选择的行中的相应像素。 行解码器允许包括在像素阵列中的单位像素的积分时间点相同。 因此，可以防止图像的失真。

公开(公告)号：US20070263107A1

公开(公告)日：2007-11-15

申请号：US11571436

申请日：2005-06-30

Applicant: Youn Jung Lee ,  Jae Soon Hwang ,  Hun Joon Jung

Inventor： Youn Jung Lee ,  Jae Soon Hwang ,  Hun Joon Jung

IPC: H04N5/335

CPC classification number: H04N5/3765

Abstract: Disclosed herein is a Complementary Metal-Oxide-Silicon (CMOS) image sensor The image sensor includes a two-dimensional pixel array composed of unit pixels, each unit pixel having a photo diode and transistors, a row decoder located at an end of the pixel array to assign row addresses, and a column decoder located at another end of the pixel array, which is erpendicular to the row decoder, to assign column addresses to corresponding pixels in rows selected by the row decoder The row decoder allows the integration time points of the unit pixels, which are included in the pixel array, to be identical. Accordingly, the distortion of images can be prevented.

Abstract translation: 本文公开了互补金属氧化物 - 硅（CMOS）图像传感器。图像传感器包括由单位像素组成的二维像素阵列，每个单位像素具有光电二极管和晶体管，位于像素的端部的行解码器 阵列以分配行地址，以及位于与行解码器垂直的像素阵列的另一端的列解码器，以将列地址分配给由行解码器选择的行中的相应像素。行解码器允许集成时间点 包括在像素阵列中的单位像素相同。 因此，可以防止图像的失真。

公开(公告)号：US06538266B2

公开(公告)日：2003-03-25

申请号：US09864660

申请日：2001-05-24

Applicant: Youn-Jung Lee ,  Yong-Ha Song

Inventor： Youn-Jung Lee ,  Yong-Ha Song

IPC: H01L2974

CPC classification number: H01L27/0251 ,  H01L27/0262 ,  H01L29/87

Abstract: A semiconductor device for lowering a triggering voltage includes a semiconductor substrate with a first conductivity; a semiconductor region formed in the substrate having a second conductivity; a first region formed in the substrate, having the first conductivity and being apart from the semiconductor region; a second region formed in the substrate having the second conductivity and being spaced apart from the semiconductor region and first region; a third region formed in the substrate, having the second conductivity and being spaced apart from the semiconductor region, the first and second regions; a fourth region formed in the semiconductor region, having the second conductivity and being connected to the third region through a conductive material; a fifth region formed in the semiconductor region, having the first conductivity and being spaced apart from the fourth region; and a sixth region formed in the semiconductor region, having the second conductivity and being spaced apart from the fourth and fifth regions.

公开(公告)号：US07961239B2

公开(公告)日：2011-06-14

申请号：US11571371

申请日：2005-06-16

Applicant: Youn Jung Lee

Inventor： Youn Jung Lee

IPC: H04N5/335

CPC classification number: H04N9/045 ,  H01L27/14603 ,  H01L27/14621 ,  H01L27/14645 ,  H04N5/376 ,  H04N2209/045

Abstract: The present invention relates to a CMOS image sensor. According to the present invention, the CMOS image sensor includes a two-dimensional pixel array (110), a row decoder (130), and a column decoder (150). The two-dimensional pixel array (110) includes rectangular unit pixels each having a width to length ratio of 1:2. The row decoder (130) is placed on one side of the pixel array to designate a row address. The column decoder (150) is placed on another side of the pixel array to be perpendicular to the row decoder and is adapted to extract data of respective pixels from a row selected by the row decoder, amplify the extracted data and generate image data including pixel values. As a result, the present invention is advantageous in that it can easily perform interpolation compared to an image sensor having regular quadrilateral unit pixels.

Abstract translation: CMOS图像传感器技术领域本发明涉及CMOS图像传感器。 根据本发明，CMOS图像传感器包括二维像素阵列（110），行解码器（130）和列解码器（150）。 二维像素阵列（110）包括宽度比为1:2的矩形单位像素。 行解码器（130）被放置在像素阵列的一侧以指定行地址。 列解码器（150）被放置在像素阵列的另一侧以垂直于行解码器，并且适于从行解码器选择的行中提取各个像素的数据，放大提取的数据并生成包括像素的图像数据 价值观。 结果，本发明的优点在于，与具有规则四边形单位像素的图像传感器相比，可以容易地执行插值。

公开(公告)号：US20080049112A1

公开(公告)日：2008-02-28

申请号：US11571371

申请日：2005-06-16

Applicant: Youn Jung Lee

Inventor： Youn Jung Lee

IPC: H04N3/14

CPC classification number: H04N9/045 ,  H01L27/14603 ,  H01L27/14621 ,  H01L27/14645 ,  H04N5/376 ,  H04N2209/045

Abstract: The present invention relates to a CMOS image sensor. According to the present invention, the CMOS image sensor includes a two-dimensional pixel array (110), a row decoder (130), and a column decoder (150). The two-dimensional pixel array (110) includes rectangular unit pixels each having a width to length ratio of 1:2. The row decoder (130) is placed on one side of the pixel array to designate a row address. The column decoder (150) is placed on another side of the pixel array to be perpendicular to the row decoder and is adapted to extract data of respective pixels from a row selected by the row decoder, amplify the extracted data and generate image data including pixel values. As a result, the present invention is advantageous in that it can easily perform interpolation compared to an image sensor having regular quadrilateral unit pixels.

Abstract translation: CMOS图像传感器技术领域本发明涉及CMOS图像传感器。 根据本发明，CMOS图像传感器包括二维像素阵列（110），行解码器（130）和列解码器（150）。 二维像素阵列（110）包括宽度比为1:2的矩形单位像素。 行解码器（130）被放置在像素阵列的一侧以指定行地址。 列解码器（150）被放置在像素阵列的另一侧以垂直于行解码器，并且适于从行解码器选择的行中提取各个像素的数据，放大提取的数据并生成包括像素的图像数据 价值观。 结果，本发明的优点在于，与具有规则四边形单位像素的图像传感器相比，可以容易地执行插值。