公开(公告)号：US20230009881A1

公开(公告)日：2023-01-12

申请号：US17371459

申请日：2021-07-09

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Eric J. Chapman ,  Alan D. Smith ,  Edward Chang

IPC: G06F1/28

Abstract: A multi-die processor semiconductor package includes a first base integrated circuit (IC) die configured to provide, based at least in part on an indication of a configuration of a first plurality of compute dies 3D stacked on top of the first base IC die, a unique power domain to each of the first plurality of compute dies. In some embodiments, the semiconductor package also includes a second base IC die including a second plurality of compute dies 3D stacked on top of the second base IC die and an interconnect communicably coupling the first base IC die to the second base IC die.

公开(公告)号：US11960340B2

公开(公告)日：2024-04-16

申请号：US17521578

申请日：2021-11-08

Applicant: Advanced Micro Devices, Inc.

Inventor： Eric J. Chapman ,  Stephen Victor Kosonocky ,  Kaushik Mazumdar ,  Vydhyanathan Kalyanasundharam ,  Samuel Naffziger ,  Eric M. Scott

IPC: G06F1/30

CPC classification number: G06F1/30

Abstract: A method for controlling a data processing system includes detecting a droop in a power supply voltage of a functional circuit of the data processing system greater than a programmable droop threshold. An operation of the data processing system is throttled according to a programmable step size, a programmable assertion time, and a programmable de-assertion time in response to detecting the droop.

公开(公告)号：US11960339B2

公开(公告)日：2024-04-16

申请号：US17371459

申请日：2021-07-09

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Eric J. Chapman ,  Alan D. Smith ,  Edward Chang

IPC: G06F1/28 ,  H01L25/18

CPC classification number: G06F1/28 ,  H01L25/18

Abstract: A multi-die processor semiconductor package includes a first base integrated circuit (IC) die configured to provide, based at least in part on an indication of a configuration of a first plurality of compute dies 3D stacked on top of the first base IC die, a unique power domain to each of the first plurality of compute dies. In some embodiments, the semiconductor package also includes a second base IC die including a second plurality of compute dies 3D stacked on top of the second base IC die and an interconnect communicably coupling the first base IC die to the second base IC die.

公开(公告)号：US20230144770A1

公开(公告)日：2023-05-11

申请号：US17521578

申请日：2021-11-08

Applicant: Advanced Micro Devices, Inc.

Inventor： Eric J. Chapman ,  Stephen Victor Kosonocky ,  Kaushik Mazumdar ,  Vydhyanathan Kalyanasundharam ,  Samuel Naffziger ,  Eric M. Scott

IPC: G06F1/30

CPC classification number: G06F1/30

Abstract: A method for controlling a data processing system includes detecting a droop in a power supply voltage of a functional circuit of the data processing system greater than a programmable droop threshold. An operation of the data processing system is throttled according to a programmable step size, a programmable assertion time, and a programmable de-assertion time in response to detecting the droop.