公开(公告)号：US20230198527A1

公开(公告)日：2023-06-22

申请号：US17554722

申请日：2021-12-17

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： RAMON A. MANGASER ,  SRIKANTH REDDY GRUDDANTI ,  PRASANT KUMAR VALLUR ,  KRISHNA REDDY MUDIMELA VENKATA ,  OIKWAN TSANG

IPC: H03K19/20 ,  H03K3/037 ,  G06F1/06

CPC classification number: H03K19/20 ,  H03K3/037 ,  G06F1/06

Abstract: A clock circuit for clock gating using a cascaded clock gating control signal, including: a first B-latch accepting, as input, a clock gating control signal and enabled by a first clock signal; a second B-latch accepting, as input, an output from the first B-latch and enabled by a second clock signal; and a first logic outputting, based on the first B-latch, a first gated clock signal; and a second logic outputting, based on the second B-latch, a second gated clock signal.