公开(公告)号：US09762919B2

公开(公告)日：2017-09-12

申请号：US14472119

申请日：2014-08-28

Applicant: Apple Inc.

Inventor： Guy Cote ,  Joseph P. Bratt ,  Timothy J. Millet ,  Shing I. Kong ,  Joseph J. Cheng

IPC: H04N19/127 ,  H04N19/176 ,  H04N19/186 ,  H04N19/423 ,  H04N19/433 ,  G06F12/00 ,  H04N19/42 ,  H04N19/172 ,  G06T1/60

CPC classification number: H04N19/186 ,  G06F12/00 ,  G06F12/0207 ,  G06F12/0862 ,  G06F12/121 ,  G06F2212/1024 ,  G06F2212/455 ,  G06F2212/6024 ,  G06F2212/6026 ,  G06T1/60 ,  H04N19/127 ,  H04N19/172 ,  H04N19/176 ,  H04N19/423 ,  H04N19/433 ,  H04N19/439

Abstract: Methods and apparatus for caching reference data in a block processing pipeline. A cache may be implemented to which reference data corresponding to motion vectors for blocks being processed in the pipeline may be prefetched from memory. Prefetches for the motion vectors may be initiated one or more stages prior to a processing stage. Cache tags for the cache may be defined by the motion vectors. When a motion vector is received, the tags can be checked to determine if there are cache block(s) corresponding to the vector (cache hits) in the cache. Upon a cache miss, a cache block in the cache is selected according to a replacement policy, the respective tag is updated, and a prefetch (e.g., via DMA) for the respective reference data is issued.

公开(公告)号：US20160065973A1

公开(公告)日：2016-03-03

申请号：US14472119

申请日：2014-08-28

Applicant: APPLE INC.

Inventor： Guy Cote ,  Joseph P. Bratt ,  Timothy J. Millet ,  Shing I. Kong ,  Joseph J. Cheng

IPC: H04N19/186 ,  H04N19/423 ,  H04N19/172 ,  H04N19/176

CPC classification number: H04N19/186 ,  G06F12/00 ,  G06F12/0207 ,  G06F12/0862 ,  G06F12/121 ,  G06F2212/1024 ,  G06F2212/455 ,  G06F2212/6024 ,  G06F2212/6026 ,  G06T1/60 ,  H04N19/127 ,  H04N19/172 ,  H04N19/176 ,  H04N19/423 ,  H04N19/433 ,  H04N19/439

Abstract: Methods and apparatus for caching reference data in a block processing pipeline. A cache may be implemented to which reference data corresponding to motion vectors for blocks being processed in the pipeline may be prefetched from memory. Prefetches for the motion vectors may be initiated one or more stages prior to a processing stage. Cache tags for the cache may be defined by the motion vectors. When a motion vector is received, the tags can be checked to determine if there are cache block(s) corresponding to the vector (cache hits) in the cache. Upon a cache miss, a cache block in the cache is selected according to a replacement policy, the respective tag is updated, and a prefetch (e.g., via DMA) for the respective reference data is issued.

Abstract translation: 在块处理流水线中缓存参考数据的方法和装置。 可以实现缓存，其可以从存储器预取哪个对应于在流水线中处理的块的运动矢量的参考数据。 可以在处理阶段之前一个或多个阶段启动用于运动矢量的预取。 高速缓存的缓存标签可以由运动向量定义。 当接收到运动矢量时，可以检查标签以确定是否存在与缓存中的向量（高速缓存命中）相对应的高速缓存块。 在缓存未命中时，根据替换策略来选择高速缓存中的高速缓存块，相应的标签被更新，并且发出用于各个参考数据的预取（例如，经由DMA）。