公开(公告)号：US12111714B2

公开(公告)日：2024-10-08

申请号：US18339963

申请日：2023-06-22

Applicant: ATI Technologies ULC

Inventor： Shahriar Pezeshgi ,  Jun Huang ,  Mohammad Hamed Mousazadeh ,  Alexander S. Duenas

IPC: G06F1/32 ,  G06F1/3234 ,  G06F9/4401 ,  G06F9/445

CPC classification number: G06F1/3234 ,  G06F9/4411 ,  G06F9/44505 ,  Y02D10/00

Abstract: A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.

公开(公告)号：US20230333624A1

公开(公告)日：2023-10-19

申请号：US18339963

申请日：2023-06-22

Applicant: ATI Technologies ULC

Inventor： Shahriar Pezeshgi ,  Jun Huang ,  Mohammad Hamed Mousazadeh ,  Alexander S. Duenas

IPC: G06F1/3234 ,  G06F9/4401 ,  G06F9/445

CPC classification number: G06F1/3234 ,  G06F9/4411 ,  G06F9/44505 ,  Y02D10/00

Abstract: A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.

公开(公告)号：US20180143680A1

公开(公告)日：2018-05-24

申请号：US15355569

申请日：2016-11-18

Applicant: ATI Technologies ULC

Inventor： Shahriar Pezeshgi ,  Jun Huang ,  Mohammad Hamed Mousazadeh ,  Alexander S. Duenas

IPC: G06F1/32 ,  G06F9/445

CPC classification number: G06F1/3234 ,  G06F9/4411 ,  G06F9/44505 ,  Y02D10/43

Abstract: A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.

公开(公告)号：US11703931B2

公开(公告)日：2023-07-18

申请号：US17133854

申请日：2020-12-24

Applicant: ATI Technologies ULC

Inventor： Shahriar Pezeshgi ,  Jun Huang ,  Mohammad Hamed Mousazadeh ,  Alexander S. Duenas

IPC: G06F1/32 ,  G06F1/3234 ,  G06F9/4401 ,  G06F9/445

CPC classification number: G06F1/3234 ,  G06F9/4411 ,  G06F9/44505 ,  Y02D10/00

Abstract: A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.

公开(公告)号：US10649518B2

公开(公告)日：2020-05-12

申请号：US15416955

申请日：2017-01-26

Applicant: ATI Technologies ULC

Inventor： Soon Kyu Kwon ,  Jun Huang ,  Shahriar Pezeshgi ,  Alexander Sabino Duenas

IPC: G06F1/3234 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3218 ,  G06T1/20

Abstract: A GPU performs dynamic power level management by switching between pre-defined power levels having distinct clock and voltage levels. The dynamic power level management includes identifying a first performance metric associated with processing workloads at the for a consecutive number of measurement cycles. In some embodiments, the consecutive number of measurement cycles includes a current measurement cycle and at least one previous measurement cycle. Based on a determination that the consecutive number of measurement cycles exceeds a minimum hysteresis number, an estimated optimization is determined to be applied to the GPU for a future measurement cycle. A power level setting at the GPU for the future measurement cycle is adjusted based on the estimated optimization. By considering performance metrics including, for example, different processing workloads and hardware configurations, the GPU is able to dynamically adapt its power settings to the particular workload that it is currently processing.

公开(公告)号：US20210116987A1

公开(公告)日：2021-04-22

申请号：US17133854

申请日：2020-12-24

Applicant: ATI Technologies ULC

Inventor： Shahriar Pezeshgi ,  Jun Huang ,  Mohammad Hamed Mousazadeh ,  Alexander S. Duenas

IPC: G06F1/3234 ,  G06F9/445 ,  G06F9/4401

Abstract: A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.