公开(公告)号：US12105666B2

公开(公告)日：2024-10-01

申请号：US17234191

申请日：2021-04-19

Applicant: Advanced Micro Devices, Inc. ,  ATI TECHNOLOGIES ULC

Inventor： Shijie Che ,  Wentao Xu ,  Randall Brown ,  Vaibhav Amarayya Hiremath ,  Manuchehr Taghi-Loo

IPC: G06F9/38 ,  G06F15/177 ,  H04L41/0893

CPC classification number: G06F15/177 ,  G06F9/3877 ,  H04L41/0893

Abstract: A computing system may implement a method for creating a first subdomain by configuring one of a first plurality of slave nodes as a first subdomain master node and configuring one or more other slave nodes of the first plurality of slave nodes as first subdomain slave nodes to the first subdomain master node.

公开(公告)号：US11604655B2

公开(公告)日：2023-03-14

申请号：US17095904

申请日：2020-11-12

Applicant: ATI Technologies ULC ,  Advanced Micro Devices, Inc.

Inventor： Wentao Xu ,  Randall Alexander Brown ,  Vaibhav Amarayya Hiremath ,  Shijie Che ,  Kamraan Nasim

IPC: G06F9/44 ,  G06F9/4401

Abstract: In a system with a master processor and slave processors, sync points are used in boot instructions. While executing the boot instructions, the slave processor determines whether the sync point is enabled. In response to determining the sync point is enabled, the slave processor pauses execution of the boot instructions, waits for commands from the master processor, receives commands from the master processor, executes the received commands until a release command is received, and then continues to execute boot instructions. In response to determining the sync point is not enabled, the slave processor continues to execute boot instructions.

公开(公告)号：US20220147366A1

公开(公告)日：2022-05-12

申请号：US17095904

申请日：2020-11-12

Applicant: ATI Technologies ULC ,  Advanced Micro Devices, Inc.

Inventor： Wentao Xu ,  Randall Alexander Brown ,  Vaibhav Amarayya Hiremath ,  Shijie Che ,  Kamraan Nasim

IPC: G06F9/4401

Abstract: In a system with a master processor and slave processors, sync points are used in boot instructions. While executing the boot instructions, the slave processor determines whether the sync point is enabled. In response to determining the sync point is enabled, the slave processor pauses execution of the boot instructions, waits for commands from the master processor, receives commands from the master processor, executes the received commands until a release command is received, and then continues to execute boot instructions. In response to determining the sync point is not enabled, the slave processor continues to execute boot instructions.

公开(公告)号：US20220335003A1

公开(公告)日：2022-10-20

申请号：US17234191

申请日：2021-04-19

Applicant: Advanced Micro Devices, Inc.

Inventor： Shijie Che ,  Wentao Xu ,  Randall Brown ,  Vaibhav Amarayya Hiremath ,  Manuchehr Taghi-Loo

IPC: G06F15/177 ,  G06F9/50 ,  G06F9/38 ,  H04L29/12

Abstract: A computing system may implement a method for creating a first subdomain by configuring one of a first plurality of slave nodes as a first subdomain master node and configuring one or more other slave nodes of the first plurality of slave nodes as first subdomain slave nodes to the first subdomain master node.

公开(公告)号：US20230205935A1

公开(公告)日：2023-06-29

申请号：US17563900

申请日：2021-12-28

Applicant: ATI Technologies ULC

Inventor： Shijie Che ,  Wentao Xu

IPC: G06F21/72

CPC classification number: G06F21/72

Abstract: A system and method for efficiently processing security service requests are described. In various implementations, an integrated circuit includes at least one or more processors with a dedicated security processor and on-chip memory that has a higher security level than off-chip memory. During the processing of security service requests, the security processor receives multiple commands with each including a cryptographic function. The security processor identifies one or more issue groups of commands based at least upon data dependencies and shared source data. When the security processor determines an issued command is in a given issue group, the security processor issues a next command from remaining commands in the given issue group. Otherwise, the security processor issues an immediately next in-order command after the issued command.