公开(公告)号：US20020048839A1

公开(公告)日：2002-04-25

申请号：US09954861

申请日：2001-09-18

Applicant: AXSUN Technologies, Inc.

Inventor： Michael F. Miller ,  Minh Van Le ,  Christopher C. Cook ,  Dale C. Flanders ,  Steven F. Nagle

IPC: H01L021/00

CPC classification number: B81B3/0083 ,  B81B2201/042 ,  B81B2201/047 ,  B81C1/0038 ,  B81C2201/0159 ,  B81C2201/053 ,  B81C2201/056 ,  G02B26/001

Abstract: A process for patterning dielectric layers of the type typically found in optical coatings in the context of MEMS manufacturing is disclosed. A dielectric coating is deposited over a device layer, which has or will be released, and patterned using a mask layer. In one example, the coating is etched using the mask layer as a protection layer. In another example, a lift-off process is shown. The primary advantage of photolithographic patterning of the dielectric layers in optical MEMS devices is that higher levels of consistency can be achieved in fabrication, such as size, location, and residual material stress. Competing techniques such as shadow masking yield lower quality features and are difficult to align. Further, the minimum feature size that can be obtained with shadow masks is limited to null100 nullm, depending on the coating system geometry, and they require hard contact with the surface of the wafer, which can lead to damage and/or particulate contamination.

Abstract translation: 公开了一种用于在MEMS制造的上下文中通常在光学涂层中发现的类型的介电层图案的工艺。 电介质涂层沉积在器件层上，器件层已经或将被释放，并使用掩模层进行图案化。 在一个实例中，使用掩模层作为保护层来蚀刻涂层。 在另一示例中，示出了剥离过程。 光学MEMS器件中电介质层的光刻图案的主要优点是可以在诸如尺寸，位置和残余材料应力的制造中实现更高水平的稠度。 诸如阴影掩蔽的竞争技术产生较低的质量特征并且难以对准。 此外，根据涂层系统的几何形状，使用荫罩可获得的最小特征尺寸限制在〜100μm，并且它们需要与晶片的表面硬接触，这可能导致损坏和/或微粒污染。