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1.发明公开公开(公告)号：US20240304746A1
公开(公告)日：2024-09-12
申请号：US18601486
申请日：2024-03-11
IPC分类号： H01L31/18
CPC分类号： H01L31/184 , H01L31/186
摘要： A method for stripping a III-V semiconductor layer epitaxially grown on a semiconductor wafer, and the semiconductor wafer is designed as a substrate and has an upper side, a buffer layer and the semiconductor layer being formed on the upper side, and a carrier layer being formed above the semiconductor layer, and the sacrificial layer having a higher wet chemical etching rate compared to the semiconductor layer, the semiconductor layer being introduced into a receiving device in a process step, and position data of points arranged on the upper side being read out from a memory device in a process step, and a laser approaching the points based on the position data in a process step, and holes having a base being produced through the carrier layer and the layer formed beneath the carrier layer via the laser, the base of the hole being formed within the buffer layer.
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公开(公告)号：US20210159349A1
公开(公告)日：2021-05-27
申请号：US17101494
申请日：2020-11-23
发明人： Wolfgang KOESTLER , Alexander FREY
IPC分类号： H01L31/0216 , H01L31/0224 , H01L31/18
摘要： A stacked multi-junction solar cell with a front side contacted through the rear side and having a solar cell stack having a Ge substrate layer, a Ge subcell, and at least two III-V subcells, with a through contact opening, a front terminal contact, a rear terminal contact, an antireflection layer formed on a part of the front side of the multi-junction solar cell, a dielectric insulating layer, and a contact layer. The dielectric insulating layer covers the antireflection layer, an edge region of a top of the front terminal contact, a lateral surface of the through contact opening, and a region of the rear side of the solar cell stack adjacent to the through contact opening. The contact layer from a region of the top of the front terminal contact that is not covered by the dielectric insulating layer through the through contact opening to the rear side.
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公开(公告)号：US20210066519A1
公开(公告)日：2021-03-04
申请号：US17007781
申请日：2020-08-31
发明人： Wolfgang KOESTLER
IPC分类号： H01L31/0224 , H01L31/0352
摘要： A stacked multi-junction solar cell with a back-contacted front side, having a germanium substrate that forms a rear side of the multi-junction solar cell, a germanium sub-cell and at least two III-V sub-cells, successively in the named order, and at least one passage contact opening that extends from the front side of the multi-junction solar cell through the sub-cells to the rear side and a metallic connection contact that is guided through the passage contact opening. A diameter of the passage contact opening decreases in steps from the front side to the rear side of the multi-junction solar cell. The front side of the germanium sub-cell forms a first step having a first tread depth that circumferentially projects into the passage contact opening. The second step with a second tread depth circumferentially projects into the passage contact opening.
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公开(公告)号：US20210066533A1
公开(公告)日：2021-03-04
申请号：US17007676
申请日：2020-08-31
IPC分类号： H01L31/18 , H01L21/78 , H01L31/0475
摘要： A dicing method for separating a wafer comprising a plurality of solar cells stack along at least one parting line, at least having the steps of: providing the wafer with a top, a bottom, an adhesive layer which is integrally bonded with the top and a cover glass layer which is integrally bonded with the adhesive layer, wherein the wafer includes a plurality of solar cell stacks, each having a germanium substrate layer forming the bottom of the wafer, a germanium sub-cell and at least two III-V sub-cells; creating a separating trench along the parting line by means of laser ablation, which extends from a bottom of the wafer through the wafer and the adhesive layer at least up to a top of the cover glass layer; and dividing the cover glass layer along the separating trench.
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公开(公告)号：US20210066518A1
公开(公告)日：2021-03-04
申请号：US17007711
申请日：2020-08-31
IPC分类号： H01L31/0224
摘要： A metallization method for a semiconductor wafer having at least the steps: providing a semiconductor wafer having a top side and a bottom side and comprising a plurality of solar cell stacks, wherein each solar cell stack has a Ge substrate forming the bottom side of the semiconductor wafer, a Ge subcell, and at least two III-V subcells in the order mentioned, as well as at least one through-hole, extending from the top side to the bottom side of the semiconductor wafer, with a continuous side wall and a circumference that is oval in cross section, applying a photoresist layer in certain areas as a resist pattern by means of a printing method to the top side and/or to bottom side of the semiconductor wafer, applying a metal layer in a planar manner to exposed regions of the surface of the semiconductor wafer.
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公开(公告)号：US20200013927A1
公开(公告)日：2020-01-09
申请号：US16574920
申请日：2019-09-18
摘要： A method for producing a light-emitting diode with a stacked structure, having a first region and a second region and a third region, wherein all three regions have a substrate and an n-doped lower cladding layer and an active layer generating electromagnetic radiation, wherein the active layer includes a quantum well structure, and a p-doped upper cladding layer, and the first region additionally has a tunnel diode formed on the upper cladding layer and composed of a p+ layer and an n+ layer, and an n-doped current distribution layer. The current distribution layer and the n-doped contact layer are covered with a conductive trace. At least the lower cladding layer, the active layer, the upper cladding layer, the tunnel diode, and the current distribution layer are monolithic in design. The second region has a contact hole with a bottom region.
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公开(公告)号：US20220285567A1
公开(公告)日：2022-09-08
申请号：US17685074
申请日：2022-03-02
发明人： Wolfgang KOESTLER , Tim KUBERA
摘要： A method for plating by means of a through-hole on a semiconductor wafer at least comprising the steps: providing a semiconductor wafer having a top side and a bottom side, wherein the semiconductor wafer has a plurality of solar cell stacks and comprises a substrate on the bottom side, and each solar cell stack has at least two III-V subcells, disposed on the substrate, and at least one through-hole, extending from the top side to the bottom side of the semiconductor wafer, with a continuous side wall, wherein the through-hole has a first edge region on the top side and a second edge region on the bottom side; applying an insulating layer to part of the first edge region, the side wall, and to the second edge region by means of a first printing process; and applying an electrically conductive layer.
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公开(公告)号：US20210066534A1
公开(公告)日：2021-03-04
申请号：US17007545
申请日：2020-08-31
发明人： Wolfgang KOESTLER
IPC分类号： H01L31/18
摘要： A two-step hole etching method including: providing a semiconductor wafer which has a plurality of solar cell stacks and performing a first and a second processing step. In the first processing step, a first resist layer is applied to a top surface of the semiconductor wafer, at least a first opening is produced in the first resist layer and, via a first etching process, a hole which extends beyond a p/n junction of the Ge sub-cell into the semiconductor wafer is produced in the area of the first opening. In the second process step a second resist layer is applied to the top surface of the semiconductor wafer, a second opening greater than the first opening and surrounding the hole is produced in the second resist layer, and, the hole is widened in an area which extends to the Ge sub-cell serving as an etch stop layer.
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公开(公告)号：US20210066517A1
公开(公告)日：2021-03-04
申请号：US17007597
申请日：2020-08-31
IPC分类号： H01L31/0224 , H01L31/0216
摘要： A stacked multi-junction solar cell with a metallization comprising a multilayer system, wherein the multi-junction solar cell has a germanium substrate forming a bottom side of the multi-junction solar cell, a germanium subcell, and at least two III-V subcells, the multilayer system of the metallization has a first layer, comprising gold and germanium, a second layer comprising titanium, a third layer, comprising palladium or nickel or platinum, with a layer thickness, and at least one metallic fourth layer, and the multilayer system of the metallization covers at least one first and second surface section and is integrally connected to the first and second surface section, wherein the first surface section is formed by the dielectric insulation layer and the second surface section is formed by the germanium substrate or by a III-V layer.
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公开(公告)号：US20200066932A1
公开(公告)日：2020-02-27
申请号：US16673160
申请日：2019-11-04
IPC分类号： H01L31/167 , H01L31/0304 , H01L31/113 , H01L31/102 , H03K19/14
摘要： A light receiving unit having a first energy source made up of two sub sources. A first terminal contact is formed at the upper face of the first sub source and a second terminal contact is formed at the lower face of the second sub source. The sub source has at least one semiconductor diode that has an absorption edge adapted to a first wavelength of light and the second semiconductor diode has an absorption edge adapted to a second wavelength of light which is different from the first wavelength of light, such that the first sub source generates electric voltage upon being irradiated with the first wavelength of light and the second sub source generates electric voltage upon being irradiated with the second wavelength of light.
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