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    Clock and periodic computing machines
    1.
    发明授权
    Clock and periodic computing machines 有权

    公开(公告)号：US12034445B2

    公开(公告)日：2024-07-09

    申请号：US17531788

    申请日：2021-11-21

    申请人： Michael Stephen Fiske

    发明人： Michael Stephen Fiske

    IPC分类号： H04L9/00 ,  G06F21/60 ,  H03K3/0233 ,  H03K19/017 ,  H03K19/14 ,  H03K19/17736

    CPC分类号： H03K19/1774 ,  G06F21/602 ,  H03K3/0233 ,  H03K19/01728 ,  H03K19/14

    摘要： A new computational machine is invented, called a clock machine, that is a novel alternative to computing machines (digital computers) based on logic gates. In an embodiment, computation is performed with one or more clock machines that use time, and can perform any Boolean function. In an embodiment, a cryptographic cipher is implemented with random clock machines, constructed from a non-deterministic process, wherein the compiled set of instructions (i.e., the implementation of the cryptographic procedure) is distinct on each device or chip that executes the cryptographic cipher. In an embodiment, by using a different set of clock machines to execute two different instances of the same cryptographic procedure, each execution of a procedure looks different to malware that may try to infect and subvert the cryptographic procedure. This cryptographic process helps hinder timing attacks. In an embodiment, a detailed implementation of the Midori cipher with random clock machines is described.

    Clock and Periodic Computing Machines
    2.
    发明申请
    Clock and Periodic Computing Machines 有权

    公开(公告)号：US20220085816A1

    公开(公告)日：2022-03-17

    申请号：US17531788

    申请日：2021-11-21

    申请人： Michael Stephen Fiske

    发明人： Michael Stephen Fiske

    IPC分类号： H03K19/17736 ,  H03K19/017 ,  H03K19/14 ,  H03K3/0233 ,  G06F21/60

    摘要： A new computational machine is invented, called a clock machine, that is a novel alternative to computing machines (digital computers) based on logic gates. In an embodiment, computation is performed with one or more clock machines that use time, and can perform any Boolean function. In an embodiment, a cryptographic cipher is implemented with random clock machines, constructed from a non-deterministic process, wherein the compiled set of instructions (i.e., the implementation of the cryptographic procedure) is distinct on each device or chip that executes the cryptographic cipher. In an embodiment, by using a different set of clock machines to execute two different instances of the same cryptographic procedure, each execution of a procedure looks different to malware that may try to infect and subvert the cryptographic procedure. This cryptographic process helps hinder timing attacks. In an embodiment, a detailed implementation of the Midori cipher with random clock machines is described.

    I—V conversion module
    3.
    发明授权
    I—V conversion module 有权

    公开(公告)号：US10727791B2

    公开(公告)日：2020-07-28

    申请号：US16057216

    申请日：2018-08-07

    申请人： SHENZHEN GOODIX TECHNOLOGY CO., LTD.

    发明人： Mengwen Zhang

    IPC分类号： H03F3/08 ,  H03F1/42 ,  H03K19/14 ,  H03G1/00 ,  H03G3/30 ,  G01B15/00 ,  H03G3/00 ,  H03F3/70 ,  H03F3/72 ,  H03F3/00 ,  H03F1/02 ,  H03K3/012 ,  G05F1/565 ,  H03G5/12

    摘要： An I-V conversion module includes: a current output type sensor, a pre-integral circuit, a charge transfer auxiliary circuit, and an I-V transformation circuit including an inverting amplifier. The current output type sensor is connected to an input end of the I-V transformation circuit through the pre-integral circuit. The charge transfer auxiliary circuit connects in parallel with the inverting amplifier. When both the pre-integral circuit and the charge transfer auxiliary circuit are open circuits, the pre-integral circuit pre-integrates the induction current output by the current output type sensor to store pre-integral charges. When both pre-integral circuit and the charge transfer auxiliary circuit are closed circuits, the pre-integral charges are transferred to the I-V transformation circuit. In these embodiments, both the time for establishing the I-V conversion module and power consumption can be reduced.

    Electronic component
    6.
    发明授权
    Electronic component 失效
    电子元器件

    公开(公告)号：US5654579A

    公开(公告)日：1997-08-05

    申请号：US424451

    申请日：1995-06-16

    申请人： Norbert Bauer ,  Friedrich Bobel ,  Hermann Haken

    发明人： Norbert Bauer ,  Friedrich Bobel ,  Hermann Haken

    IPC分类号： H01L27/14 ,  G01J1/44 ,  G01R19/165 ,  G06F15/18 ,  G06G7/12 ,  G06N3/063 ,  H01L27/15 ,  H01L29/36 ,  H01L29/66 ,  H01L33/00 ,  H01L35/00 ,  H01L41/08 ,  H01S5/00 ,  H01S5/026 ,  H01L45/00 ,  G06G7/00 ,  H03K19/14 ,  H03K19/23

    CPC分类号： H01L29/66992 ,  H01L27/15 ,  H01L29/36

    摘要： Described is an electronic component with N input terminals, which admit N input signals, M output terminals, each of which is assigned to one or more input terminals, a component body in which, depending on the input signals, current paths or filaments are created which connect the N input terminals with the M output terminals, wherein, to establish a decision or displacement dynamics, an external quantity applied to the component switches the current flow through the component body between an initial distribution, in which the current densities (j.sub.i) between each input terminal and its assigned output terminal correspond to the input signal admitted at the respective input terminal, and a self-organizing distribution, in which the current flows only between the input terminal admitting the input signal with the highest value and its assigned output terminal.

    摘要翻译： PCT No.PCT / DE93 / 01039 Sec。 371日期：1995年6月16日 102（e）日期1995年6月16日PCT提交1993年10月29日PCT公布。 公开号WO94 / 10755 日期1994年5月11日描述的是具有N个输入端子的电子部件，其允许N个输入信号，M个输出端子，每个输入端子被分配给一个或多个输入端子，其中根据输入信号，电流路径 或者产生将N个输入端子与M个输出端子连接的灯丝，其中，为了建立决定或位移动力学，施加到部件的外部数量在初始分布之间切换通过部件主体的电流，其中电流 每个输入端与其分配的输出端之间的密度（ji）对应于在相应输入端允许的输入信号，以及自组织分布，其中电流仅在允许具有最高值的输入信号的输入端之间流动 及其分配的输出端子。

    Electro-optical device
    8.
    发明授权
    Electro-optical device 失效
    电光装置

    公开(公告)号：US5550856A

    公开(公告)日：1996-08-27

    申请号：US416606

    申请日：1995-04-04

    申请人： Julian Cheng

    发明人： Julian Cheng

    IPC分类号： G06E1/04 ,  H01L31/153 ,  H01S5/026 ,  H01S5/183 ,  H01S5/20 ,  H03K19/14 ,  H03K19/21 ,  H01S3/19 ,  H01S3/10

    CPC分类号： H03K19/21 ,  G06E1/04 ,  H01L31/153 ,  H01S5/0261 ,  H03K19/14 ,  H01S5/0262 ,  H01S5/042 ,  H01S5/18308 ,  H01S5/2063

    摘要： An electro-optical device includes a vertical cavity surface emitting laser, a heterojunction light emitting device and heterojunction phototransistor on a semiconductor substrate. Layers of the heterojunction phototransistor and the heterojunction light-emitting device are electrically and optically coupled so there is regenerative optical and electrical feedback between them. Layers of the heterojunction light-emitting devices are proton implanted to control the feedback. Plural such devices are electrically and optically coupled together to perform logic functions, such as EXCLUSIVE OR, in response to optical signals.

    摘要翻译： 电光装置包括垂直腔表面发射激光器，异质结发光器件和半导体衬底上的异质结光电晶体管。 异质结光电晶体管和异质结发光器件的层电耦合和光耦合，从而在它们之间存在再生光学和电反馈。 异质结发光器件的层被质子注入以控制反馈。 多个这样的设备电和光耦合在一起以执行响应于光信号的逻辑功能，例如EXCLUSIVE OR。

    Method and apparatus for performing a multiple-input optical arithmetic comparison
    10.
    发明授权
    Method and apparatus for performing a multiple-input optical arithmetic comparison 失效

    公开(公告)号：US5247473A

    公开(公告)日：1993-09-21

    申请号：US764126

    申请日：1991-09-24

    申请人： Theodore L. Houk ,  R. Aaron Falk

    发明人： Theodore L. Houk ,  R. Aaron Falk

    IPC分类号： G06E1/02 ,  H03K19/14

    CPC分类号： G06E1/02 ,  H03K19/14

    摘要： An optical arithmetic comparator (OAC) is disclosed which is capable of comparing multiple numbers simultaneously, and indicating the common value of the multiple numbers being compared if the numbers are equal. The OAC includes at least two input channels each having a plurality of sources arranged in an identical pattern, the sources being capable of selective activation such that only one source is activated at a time within each of the channels to form a specific spatial light pattern, and a detector array which determines if the specific spatial light pattern indicated the numbers being compared are equal.