WRITE COMBINING CACHE MICROARCHITECTURE FOR SYNCHRONIZATION EVENTS
    1.
    发明申请
    WRITE COMBINING CACHE MICROARCHITECTURE FOR SYNCHRONIZATION EVENTS 有权
    用于同步事件的写组合高速缓存微型架构

    公开(公告)号:US20150046652A1

    公开(公告)日:2015-02-12

    申请号:US13961561

    申请日:2013-08-07

    CPC classification number: G06F12/0815 G06F12/0811 G06F12/128 Y02D10/13

    Abstract: A method, computer program product, and system is described that enforces a release consistency with special accesses sequentially consistent (RCsc) memory model and executes release synchronization instructions such as a StRel event without tracking an outstanding store event through a memory hierarchy, while efficiently using bandwidth resources. What is also described is the decoupling of a store event from an ordering of the store event with respect to a RCsc memory model. The description also includes a set of hierarchical read/write combining buffers that coalesce stores from different parts of the system. In addition, a pool component maintains partial order of received store events and release synchronization events to avoid content addressable memory (CAM) structures, full cache flushes, as well as direct write-throughs to memory. The approach improves the performance of both global and local synchronization events since a store event may not need to reach main memory to complete.

    Abstract translation: 描述了一种方法,计算机程序产品和系统,其强制与特殊访问顺序一致(RCsc)存储器模型的版本一致性,并且执行诸如StRel事件之类的释放同步指令,而不通过存储器层次来跟踪未完成的存储事件,同时有效地使用 带宽资源。 还描述了存储事件与存储事件的顺序相对于RCsc存储器模型的去耦。 该描述还包括一组层次读/写合并缓冲器,其将来自系统的不同部分的存储合并。 此外,池组件维护接收到的存储事件的部分顺序并释放同步事件,以避免内容可寻址存储器(CAM)结构,全缓存刷新以及对存储器的直接写入。 该方法提高了全局和本地同步事件的性能,因为存储事件可能不需要到达主内存才能完成。

    RUNTIME FOR AUTOMATICALLY LOAD-BALANCING AND SYNCHRONIZING HETEROGENEOUS COMPUTER SYSTEMS WITH SCOPED SYNCHRONIZATION
    2.
    发明申请
    RUNTIME FOR AUTOMATICALLY LOAD-BALANCING AND SYNCHRONIZING HETEROGENEOUS COMPUTER SYSTEMS WITH SCOPED SYNCHRONIZATION 有权
    运行自动平衡和同步异步计算机系统与同步同步

    公开(公告)号:US20160055033A1

    公开(公告)日:2016-02-25

    申请号:US14466594

    申请日:2014-08-22

    CPC classification number: G06F9/505 G06F9/468 G06F9/5088 G06F9/52

    Abstract: Sharing tasks among compute units in a processor can increase the efficiency of the processor. When a compute unit does not have a task in its task memory to perform, donating tasks from other compute units can prevent the compute unit from being idle while there is task in other parts of the processor. It is desirable to share tasks among compute units that are within defined scopes of the processor. Compute units may share tasks by allowing other compute units to access their private memory, or by donating tasks to a shared memory.

    Abstract translation: 处理器中的计算单元之间的共享任务可以提高处理器的效率。 当计算单元在其任务存储器中没有任务执行时,捐赠来自其他计算单元的任务可能会阻止计算单元在处理器的其他部分中存在任务时处于空闲状态。 希望在处理器的定义范围内的计算单元之间共享任务。 计算单元可以通过允许其他计算单元访问其私有内存或通过将任务捐赠给共享内存来共享任务。

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