公开(公告)号：US11762777B2

公开(公告)日：2023-09-19

申请号：US17219782

申请日：2021-03-31

Applicant: Advanced Micro Devices, Inc.

Inventor： Jagadish B. Kotra ,  Marko Scrbak ,  Matthew Raymond Poremba

IPC: G06F12/0891 ,  G06F12/0853 ,  G06F3/06 ,  G06F12/0862

CPC classification number: G06F12/0891 ,  G06F3/0614 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/0853 ,  G06F12/0862

Abstract: Devices and methods for cache prefetching are provided. A device is provided which comprises memory and a processor. The memory comprises a DRAM cache, a cache dedicated to the processor and one or more intermediate caches between the dedicated cache and the DRAM cache. The processor is configured to issue prefetch requests to prefetch data, issue data access requests to fetch the data and when one or more previously issued prefetch requests are determined to be inaccurate, issue a prefetch request to prefetch a tag, corresponding to the memory address of requested data in the DRAM cache. A tag look-up is performed at the DRAM cache without performing tag look-ups at the dedicated cache or the intermediate caches. The tag is prefetched from the DRAM cache without prefetching the requested data.

公开(公告)号：US20220318151A1

公开(公告)日：2022-10-06

申请号：US17219782

申请日：2021-03-31

Applicant: Advanced Micro Devices, Inc.

Inventor： Jagadish B. Kotra ,  Marko Scrbak ,  Matthew Raymond Poremba

IPC: G06F12/0891 ,  G06F12/0853 ,  G06F12/0862 ,  G06F3/06

Abstract: Devices and methods for cache prefetching are provided. A device is provided which comprises memory and a processor. The memory comprises a DRAM cache, a cache dedicated to the processor and one or more intermediate caches between the dedicated cache and the DRAM cache. The processor is configured to issue prefetch requests to prefetch data, issue data access requests to fetch the data and when one or more previously issued prefetch requests are determined to be inaccurate, issue a prefetch request to prefetch a tag, corresponding to the memory address of requested data in the DRAM cache. A tag look-up is performed at the DRAM cache without performing tag look-ups at the dedicated cache or the intermediate caches. The tag is prefetched from the DRAM cache without prefetching the requested data.