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公开(公告)号：US10311191B2
公开(公告)日：2019-06-04
申请号：US15416731
申请日：2017-01-26
Applicant: Advanced Micro Devices, Inc.
Inventor： John J. Wuu , Patrick J. Shyvers , Ryan Alan Selby
Abstract: A system and method for floorplanning a memory. A computing system includes a processing unit which generates memory access requests and a memory. The size of each memory line in the memory includes M bits. A memory macro block includes at least a primary array and a sidecar array. The primary array stores a first portion of a memory line and the sidecar array stores a second smaller portion of the memory line being accessed. The primary array and the sidecar array have different heights. The height of the sidecar array is based on a notch height in at least one corner of the memory macro block. The notch creates on-die space for s reserved area on the die. The notches result in cross-shaped, T-shaped, and/or L-shaped memory macro blocks.
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公开(公告)号：US20180210994A1
公开(公告)日：2018-07-26
申请号：US15416731
申请日：2017-01-26
Applicant: Advanced Micro Devices, Inc.
Inventor： John J. Wuu , Patrick J. Shyvers , Ryan Alan Selby
CPC classification number: G06F17/5077 , G06F17/5072 , G06F17/5081 , G11C5/025 , G11C7/06 , G11C7/20
Abstract: A system and method for floorplanning a memory. A computing system includes a processing unit which generates memory access requests and a memory. The size of each memory line in the memory includes M bits. A memory macro block includes at least a primary array and a sidecar array. The primary array stores a first portion of a memory line and the sidecar array stores a second smaller portion of the memory line being accessed. The primary array and the sidecar array have different heights. The height of the sidecar array is based on a notch height in at least one corner of the memory macro block. The notch creates on-die space for s reserved area on the die. The notches result in cross-shaped, T-shaped, and/or L-shaped memory macro blocks.
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