专利检索 ap:("Advanced Micro Devices, Inc.") AND inv:"Vignesh ADHINARAYANAN" 第 1 页

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发明公开
3D LAYOUT AND ORGANIZATION FOR ENHANCEMENT OF MODERN MEMORY SYSTEMS 审中-公开

公开(公告)号：US20240088099A1

公开(公告)日：2024-03-14

申请号：US18215681

申请日：2023-06-28

申请人： Advanced Micro Devices, Inc.

发明人： Divya Madapusi Srinivas PRASAD , Vignesh ADHINARAYANAN , Michael IGNATOWSKI , Hyung-Dong LEE

IPC分类号： H01L25/065 , G11C11/4097 , H01L25/18

CPC分类号： H01L25/0657 , G11C11/4097 , H01L25/18 , H01L2225/06555

摘要： Memory stacks having substantially vertical bitlines, and chip packages having the same, are disclosed herein. In one example, a memory stack is provided that includes a first memory IC die and a second memory IC die. The second memory IC die is stacked on the first memory IC die. Bitlines are routed through the first and second IC dies in a substantially vertical orientation. Wordlines within the first memory IC die are oriented orthogonal to the bitlines.