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公开(公告)号:US20220236489A1
公开(公告)日:2022-07-28
申请号:US17684377
申请日:2022-03-01
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Shao Hsuan CHUANG , Huang-Hsien CHANG
IPC: G02B6/36 , H01L21/3065 , G02B6/42
Abstract: A recessed portion in a semiconductor substrate and a method of forming the same are provided. The method comprises: forming a mask on the semiconductor substrate; forming a protection layer on a top surface of the mask and on at least one sidewall of the mask, and on at least one surface of the semiconductor substrate exposed by the mask; performing a first etching process to remove the protection layer on the top surface of the mask and on a bottom surface of the semiconductor substrate exposed by the mask; and performing a second etching process to remove the remaining protection layer and to etch the semiconductor substrate to form the recessed portion. In this way, a recessed portion with relatively smooth and vertical sidewalls can be realized.
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公开(公告)号:US20210296267A1
公开(公告)日:2021-09-23
申请号:US16825713
申请日:2020-03-20
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Jhao-Cheng CHEN , Huang-Hsien CHANG , Wen-Long LU , Shao Hsuan CHUANG , Ching-Ju CHEN , Tse-Chuan CHOU
IPC: H01L23/00
Abstract: A semiconductor device and method for manufacturing the same are provided. The method includes providing a first substrate. The method also includes forming a first metal layer on the first substrate. The first metal layer includes a first metal material. The method further includes treating a first surface of the first metal layer with a solution including an ion of a second metal material. In addition, the method includes forming a plurality of metal particles including the second metal material on a portion of the first surface of the first metal layer.
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公开(公告)号:US20240168238A1
公开(公告)日:2024-05-23
申请号:US18427793
申请日:2024-01-30
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Shao Hsuan CHUANG , Huang-Hsien CHANG
IPC: G02B6/36 , G02B6/42 , H01L21/3065
CPC classification number: G02B6/3636 , G02B6/3632 , G02B6/4243 , H01L21/30655 , G02B6/3608
Abstract: A recessed portion in a semiconductor substrate and a method of forming the same are provided. The method comprises: forming a mask on the semiconductor substrate; forming a protection layer on a top surface of the mask and on at least one sidewall of the mask, and on at least one surface of the semiconductor substrate exposed by the mask; performing a first etching process to remove the protection layer on the top surface of the mask and on a bottom surface of the semiconductor substrate exposed by the mask; and performing a second etching process to remove the remaining protection layer and to etch the semiconductor substrate to form the recessed portion. In this way, a recessed portion with relatively smooth and vertical sidewalls can be realized.
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公开(公告)号:US20200343336A1
公开(公告)日:2020-10-29
申请号:US16395156
申请日:2019-04-25
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Shao Hsuan CHUANG , Huang-Hsien CHANG , Min Lung HUANG , Yu Cheng CHEN , Syu-Tang LIU
IPC: H01L49/02
Abstract: The subject application relates to a semiconductor package device, which includes a first conductive layer; a semiconductor wall disposed on the first conductive layer; a first conductive wall disposed on the first conductive layer; and an insulation layer disposed on the first conductive layer and between the semiconductor wall and the first conductive wall.
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公开(公告)号:US20230027674A1
公开(公告)日:2023-01-26
申请号:US17958237
申请日:2022-09-30
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Jhao-Cheng CHEN , Huang-Hsien CHANG , Wen-Long LU , Shao Hsuan CHUANG , Ching-Ju CHEN , Tse-Chuan CHOU
IPC: H01L23/00
Abstract: A semiconductor device and method for manufacturing the same are provided. The method includes providing a first substrate. The method also includes forming a first metal layer on the first substrate. The first metal layer includes a first metal material. The method further includes treating a first surface of the first metal layer with a solution including an ion of a second metal material. In addition, the method includes forming a plurality of metal particles including the second metal material on a portion of the first surface of the first metal layer.
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公开(公告)号:US20220108826A1
公开(公告)日:2022-04-07
申请号:US17065482
申请日:2020-10-07
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Yunghsun CHEN , Huang-Hsien CHANG , Shao Hsuan CHUANG
Abstract: An electronic device and a method for manufacturing an electronic device are provided. The electronic device includes an inductor. The inductor includes a plurality of line portions and a plurality of plate portions connected to the plurality of line portions. The line portions and the plate portions form a coil concentric to a horizontal axis.
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公开(公告)号:US20220139854A1
公开(公告)日:2022-05-05
申请号:US17084496
申请日:2020-10-29
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wan Yu CHANG , Shao Hsuan CHUANG
Abstract: A bonding structure, a package structure, and a method for manufacturing a package structure are provided. The package structure includes a first substrate, a first passivation layer, a first conductive layer, and a first conductive bonding structure. The first passivation layer is disposed on the first substrate and has an upper surface. The first passivation layer and the first substrate define a first cavity. The first conductive layer is disposed in the first cavity and has an upper surface. A portion of the upper surface of the first conductive layer is below the upper surface of the first passivation layer. The first conductive bonding structure is disposed on the first conductive layer.
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公开(公告)号:US20220028817A1
公开(公告)日:2022-01-27
申请号:US16937497
申请日:2020-07-23
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Shao Hsuan CHUANG , Huang-Hsien CHANG
IPC: H01L23/00
Abstract: At least some embodiments of the present disclosure relate to a method for manufacturing a bonding structure. The method includes: providing a substrate with a seed layer; forming a conductive pattern on the seed layer; forming a dielectric layer on the substrate and the conductive pattern; and removing a portion of the dielectric layer to expose an upper surface of the conductive pattern without consuming the seed layer.
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公开(公告)号:US20210265459A1
公开(公告)日:2021-08-26
申请号:US16802465
申请日:2020-02-26
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Shao Hsuan CHUANG , Huang-Hsien CHANG , Min Lung HUANG
IPC: H01L49/02
Abstract: A semiconductor package device includes a first conductive wall, a second conductive wall, a first insulation wall, a dielectric layer, a first electrode, and a second electrode. The first insulation wall is disposed between the first and second conductive walls. The dielectric layer has a first portion covering a bottom surface of the first conductive wall, a bottom surface of the second conductive wall and a bottom surface of the first insulation wall. The first electrode is electrically connected to the first conductive wall. The second electrode is electrically connected to the second conductive wall.
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