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公开(公告)号:US20230027674A1
公开(公告)日:2023-01-26
申请号:US17958237
申请日:2022-09-30
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Jhao-Cheng CHEN , Huang-Hsien CHANG , Wen-Long LU , Shao Hsuan CHUANG , Ching-Ju CHEN , Tse-Chuan CHOU
IPC: H01L23/00
Abstract: A semiconductor device and method for manufacturing the same are provided. The method includes providing a first substrate. The method also includes forming a first metal layer on the first substrate. The first metal layer includes a first metal material. The method further includes treating a first surface of the first metal layer with a solution including an ion of a second metal material. In addition, the method includes forming a plurality of metal particles including the second metal material on a portion of the first surface of the first metal layer.
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公开(公告)号:US20220223507A1
公开(公告)日:2022-07-14
申请号:US17707801
申请日:2022-03-29
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Syu-Tang LIU , Tsung-Tang TSAI , Huang-Hsien CHANG , Ching-Ju CHEN
IPC: H01L23/498 , H01L21/48 , H01L23/00 , H01L23/13
Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.
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公开(公告)号:US20240021540A1
公开(公告)日:2024-01-18
申请号:US18234300
申请日:2023-08-15
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Syu-Tang LIU , Min Lung HUANG , Huang-Hsien CHANG , Tsung-Tang TSAI , Ching-Ju CHEN
IPC: H01L23/00 , H01L23/31 , H01L23/367 , H01L23/538 , H01L21/48 , H01L21/56
CPC classification number: H01L23/562 , H01L23/3128 , H01L23/3675 , H01L23/5383 , H01L23/5386 , H01L21/4853 , H01L21/4857 , H01L21/4871 , H01L21/565 , H01L24/16 , H01L2924/3512 , H01L2224/16227
Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.
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公开(公告)号:US20210233836A1
公开(公告)日:2021-07-29
申请号:US16942579
申请日:2020-07-29
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Syu-Tang LIU , Tsung-Tang TSAI , Huang-Hsien CHANG , Ching-Ju CHEN
IPC: H01L23/498 , H01L23/00 , H01L23/13 , H01L21/48
Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.
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公开(公告)号:US20210151407A1
公开(公告)日:2021-05-20
申请号:US16685899
申请日:2019-11-15
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Syu-Tang LIU , Min Lung HUANG , Huang-Hsien CHANG , Tsung-Tang TSAI , Ching-Ju CHEN
IPC: H01L25/065 , H01L23/31 , H01L23/16 , H01L23/498 , H01L21/78 , H01L25/00 , H01L23/00
Abstract: A package structure includes a wiring structure and a first electronic device. The wiring structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The first electronic device is electrically connected to the wiring structure, and has a first surface, a second surface and at least one lateral side surface extending between the first surface and the second surface. The first electronic device includes a first active circuit region and a first protrusion portion. The first protrusion portion protrudes from the at least one lateral side surface of the first electronic device. A portion of the first active circuit region is disposed in the first protrusion portion.
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公开(公告)号:US20210296267A1
公开(公告)日:2021-09-23
申请号:US16825713
申请日:2020-03-20
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Jhao-Cheng CHEN , Huang-Hsien CHANG , Wen-Long LU , Shao Hsuan CHUANG , Ching-Ju CHEN , Tse-Chuan CHOU
IPC: H01L23/00
Abstract: A semiconductor device and method for manufacturing the same are provided. The method includes providing a first substrate. The method also includes forming a first metal layer on the first substrate. The first metal layer includes a first metal material. The method further includes treating a first surface of the first metal layer with a solution including an ion of a second metal material. In addition, the method includes forming a plurality of metal particles including the second metal material on a portion of the first surface of the first metal layer.
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公开(公告)号:US20210118812A1
公开(公告)日:2021-04-22
申请号:US16656331
申请日:2019-10-17
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Syu-Tang LIU , Min Lung HUANG , Huang-Hsien CHANG , Tsung-Tang TSAI , Ching-Ju CHEN
IPC: H01L23/00 , H01L23/31 , H01L23/367 , H01L23/538 , H01L21/48 , H01L21/56
Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.
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