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公开(公告)号:US20180337164A1
公开(公告)日:2018-11-22
申请号:US15599379
申请日:2017-05-18
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chien-Hua CHEN , Hung-Yi LIN , Cheng-Yuan KUNG , Teck-Chong LEE , Shiuan-Yu LIN
IPC: H01L25/16 , H01L23/522 , H01L23/00 , H01L23/532 , H01L23/31
Abstract: A semiconductor device package includes a dielectric layer, a first RDL, a second RDL, an inductor, a first electronic component and a second electronic component. The first RDL is adjacent to a first surface of the dielectric layer, and the first RDL includes first conductive pieces. The second RDL is adjacent to a second surface of the dielectric layer, and the second RDL includes second conductive pieces. The inductor is disposed in the dielectric layer. The inductor includes induction pillars, wherein each of the induction pillars is disposed through the dielectric layer, and each of the induction pillars is interconnected between a respective one of the first conductive pieces of the first RDL and a respective one of the second conductive pieces of the second RDL. The first electronic component and the second electronic component are between the first RDL and the second RDL, and electrically connected to each other through the inductor.
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公开(公告)号:US20210217701A1
公开(公告)日:2021-07-15
申请号:US16742788
申请日:2020-01-14
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Min Lung HUANG , Hung-Jung TU , Hsin Hsiang WANG , Chih-Wei HUANG , Shiuan-Yu LIN
IPC: H01L23/538 , H01L23/31 , H01L23/528 , H01L23/00 , H01L21/768
Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a first semiconductor device, a first conductive layer and a second conductive layer. The first semiconductor device has a first conductive pad. The first conductive layer is disposed in direct contact with the first conductive pad. The first conductive layer extends along a direction substantially parallel to a surface of the first conductive pad. The second conductive layer is disposed in direct contact with the first conductive pad and spaced apart from the first conductive layer.
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公开(公告)号:US20240371739A1
公开(公告)日:2024-11-07
申请号:US18144162
申请日:2023-05-05
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Pin-Yao CHEN , Shiuan-Yu LIN , Hung-Jung TU
IPC: H01L23/498 , H01L21/48 , H01L23/00
Abstract: An electronic package includes a pad, a dielectric layer, a bump, and a conductive element. The dielectric layer encapsulates the pad and includes an opening exposing the pad. The bump is disposed over the pad. The conductive element is disposed in the opening between the pad and the bump. The conductive element is configured to mitigate a shrinkage of an electrical path between the pad and the bump occupied by an expansion of the dielectric layer.
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