公开(公告)号：US20210111165A1

公开(公告)日：2021-04-15

申请号：US16653650

申请日：2019-10-15

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chao-Kai HUNG ,  Chien-Wei CHANG ,  Ya-Chen SHIH ,  Hung-Jung TU ,  Hung-Yi LIN ,  Cheng-Yuan KUNG

IPC: H01L25/16 ,  H01L25/00 ,  H01L23/00

Abstract: A device assembly structure includes a first device and at least one second device. The first device has a first active surface and a first backside surface opposite to the first active surface, and includes a plurality of first electrical contacts disposed adjacent to the first active surface. The second device has a second active surface and a second backside surface opposite to the second active surface, and includes a plurality of second electrical contacts disposed adjacent to the second active surface. The second active surface of the second device faces the first active surface of the first device, the second electrical contacts of the second device are electrically connected to the first electrical contacts of the first device, and a thickness of the second device is less than or equal to one fifth of a thickness of the first device.

公开(公告)号：US20210104595A1

公开(公告)日：2021-04-08

申请号：US17102258

申请日：2020-11-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang LIU ,  Huang-Hsien CHANG ,  Tsung-Tang TSAI ,  Hung-Jung TU

IPC: H01L49/02 ,  H01L23/522 ,  H01L21/308 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/285

Abstract: A vertical capacitor structure includes a substrate, at least a pillar, a first conductive layer, a first dielectric layer and a second conductive layer. The substrate defines a cavity. The pillar is disposed in the cavity. The first conductive layer covers and is conformal to the cavity of the substrate and the pillar, and is insulated from the substrate. The first dielectric layer covers and is conformal to the first conductive layer. The second conductive layer covers and is conformal to the first dielectric layer. The first conductive layer, the first dielectric layer and the second conductive layer jointly form a capacitor component.

公开(公告)号：US20240371739A1

公开(公告)日：2024-11-07

申请号：US18144162

申请日：2023-05-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Pin-Yao CHEN ,  Shiuan-Yu LIN ,  Hung-Jung TU

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00

Abstract: An electronic package includes a pad, a dielectric layer, a bump, and a conductive element. The dielectric layer encapsulates the pad and includes an opening exposing the pad. The bump is disposed over the pad. The conductive element is disposed in the opening between the pad and the bump. The conductive element is configured to mitigate a shrinkage of an electrical path between the pad and the bump occupied by an expansion of the dielectric layer.

公开(公告)号：US20210035899A1

公开(公告)日：2021-02-04

申请号：US16528350

申请日：2019-07-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Min Lung HUANG ,  Hung-Jung TU ,  Hsin Hsiang WANG

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor device package includes a conductive layer, a first conductive pillar, a circuit layer and a second conductive pillar. The conductive layer has a first surface. The first conductive pillar is disposed on the first surface of the conductive layer. The circuit layer is disposed over the conductive layer. The circuit layer has a first surface facing the conductive layer. The second conductive pillar is disposed on the first surface of the circuit layer. The first conductive pillar is physically spaced apart from the second conductive pillar and electrically connected to the second conductive pillar.

公开(公告)号：US20200219968A1

公开(公告)日：2020-07-09

申请号：US16239318

申请日：2019-01-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang LIU ,  Huang-Hsien CHANG ,  Tsung-Tang TSAI ,  Hung-Jung TU

IPC: H01L49/02 ,  H01L23/522 ,  H01L21/308 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/285

Abstract: A vertical capacitor structure includes a substrate, at least a pillar, a first conductive layer, a first dielectric layer and a second conductive layer. The substrate defines a cavity. The pillar is disposed in the cavity. The first conductive layer covers and is conformal to the cavity of the substrate and the pillar, and is insulated from the substrate. The first dielectric layer covers and is conformal to the first conductive layer. The second conductive layer covers and is conformal to the first dielectric layer. The first conductive layer, the first dielectric layer and the second conductive layer jointly form a capacitor component.

公开(公告)号：US20210265231A1

公开(公告)日：2021-08-26

申请号：US16799751

申请日：2020-02-24

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien Lin CHANG CHIEN ,  Chiu-Wen LEE ,  Hung-Jung TU ,  Chang Chi LEE ,  Chin-Li KAO

IPC: H01L23/367 ,  H01L23/48 ,  H01L23/00 ,  H01L21/48

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a first die, a second die, and a thermal dissipation element. The first die has a first surface. The second die is disposed on the first surface. The thermal dissipation element is disposed on the first surface. The thermal dissipation element includes a first portion extending in a first direction substantially parallel to the first surface and partially covered by the second die and a second portion extending in a second direction substantially perpendicular to the first surface to be adjacent to an edge of the second die.

公开(公告)号：US20210217701A1

公开(公告)日：2021-07-15

申请号：US16742788

申请日：2020-01-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Min Lung HUANG ,  Hung-Jung TU ,  Hsin Hsiang WANG ,  Chih-Wei HUANG ,  Shiuan-Yu LIN

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/528 ,  H01L23/00 ,  H01L21/768

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a first semiconductor device, a first conductive layer and a second conductive layer. The first semiconductor device has a first conductive pad. The first conductive layer is disposed in direct contact with the first conductive pad. The first conductive layer extends along a direction substantially parallel to a surface of the first conductive pad. The second conductive layer is disposed in direct contact with the first conductive pad and spaced apart from the first conductive layer.