公开(公告)号：US07702836B2

公开(公告)日：2010-04-20

申请号：US11886326

申请日：2007-02-16

申请人： Akinari Todoroki ,  Akihiko Tamura ,  Katsuya Tanaka ,  Hiroaki Takada ,  Shinya Honda

发明人： Akinari Todoroki ,  Akihiko Tamura ,  Katsuya Tanaka ,  Hiroaki Takada ,  Shinya Honda

IPC分类号： G06F13/24

CPC分类号： G06F9/526 ,  G06F9/4812

摘要： To provide a processor capable of achieving high processing efficiency by performing the exclusive control between task processing and interrupt handling properly even in a multiprocessor. An interrupt processor that includes a plurality of unit processors, in which at least of the plurality of unit processors is capable of performing interrupt handling requested from the outside is configured such that the unit processor P1 of the unit processors P0 to P3 comprises an purge inhibit flag 106 for causing the unit processor P1 to enter a lock state where the purge of the task is being inhibited, a hardware semaphore unit 13 for inhibiting other unit processors from accessing a predetermined region in memory accessed by the unit processor P1 after the unit processor P1 is brought into the lock state, and an interrupt control unit 11 for inhibiting the interrupt processor from performing the interrupt handling during the execution of exclusive control.

摘要翻译： 为了提供能够通过在多处理器中适当地执行任务处理和中断处理之间的排他性控制来实现高处理效率的处理器。 一种中断处理器，其包括多个单元处理器，其中至少多个单元处理器能够执行从外部请求的中断处理，使得单元处理器P0至P3的单元处理器P1包括清除禁止 标志106，用于使单位处理器P1进入禁止任务清除的锁定状态;硬件信号量单元13，用于在单元处理器之后禁止其他单元处理器访问由单元处理器P1访问的存储器中的预定区域 P1进入锁定状态，以及中断控制单元11，用于在执行排他控制期间禁止中断处理器执行中断处理。

公开(公告)号：US20080288693A1

公开(公告)日：2008-11-20

申请号：US11886326

申请日：2007-02-16

申请人： Akinari Todoroki ,  Akihiko Tamura ,  Katsuya Tanaka ,  Hiroaki Takada ,  Shinya Honda

发明人： Akinari Todoroki ,  Akihiko Tamura ,  Katsuya Tanaka ,  Hiroaki Takada ,  Shinya Honda

IPC分类号： G06F13/24

CPC分类号： G06F9/526 ,  G06F9/4812

摘要： To provide a processor capable of achieving high processing efficiency by performing the exclusive control between task processing and interrupt handling properly even in a multiprocessor. An interrupt processor that includes a plurality of unit processors, in which at least of the plurality of unit processors is capable of performing interrupt handling requested from the outside is configured such that the unit processor P1 of the unit processors P0 to P3 comprises an purge inhibit flag 106 for causing the unit processor P1 to enter a lock state where the purge of the task is being inhibited, a hardware semaphore unit 13 for inhibiting other unit processors from accessing a predetermined region in memory accessed by the unit processor P1 after the unit processor P1 is brought into the lock state, and an interrupt control unit 11 for inhibiting the interrupt processor from performing the interrupt handling during the execution of exclusive control.

摘要翻译： 为了提供能够通过在多处理器中适当地执行任务处理和中断处理之间的排他性控制来实现高处理效率的处理器。 一种包括多个单元处理器的中断处理器，其中至少多个单元处理器能够执行从外部请求的中断处理被配置为使得单元处理器P 0至P 3的单元处理器P 1包括 用于使单位处理器P1进入禁止清除任务的锁定状态的清除禁止标志106;用于禁止其他单元处理器访问由单元处理器P访问的存储器中的预定区域的硬件信号量单元13 在单元处理器P 1进入锁定状态之后的中断处理器1，以及用于在执行专用控制期间禁止中断处理器执行中断处理的中断控制单元11。

公开(公告)号：US07853743B2

公开(公告)日：2010-12-14

申请号：US11979341

申请日：2007-11-01

申请人： Akinari Todoroki ,  Katsuya Tanaka ,  Hiroaki Takada ,  Shinya Honda

发明人： Akinari Todoroki ,  Katsuya Tanaka ,  Hiroaki Takada ,  Shinya Honda

IPC分类号： G06F13/00 ,  G06F13/26

CPC分类号： G06F13/26

摘要： A processor includes: a plurality of processors; a process and status managing section which manages management information including information on statuses of the plurality of processors and priorities of processes being executed by the plurality of processors; a processing processor selecting section which selects one of the processors which is executing the process with a lowest priority on the basis of the management information managed by the process and status managing section; and an interrupt controlling section which transmits a requested interrupt process to the selected processor as an interrupt process request, wherein the processing processor selecting section selects the one of the processors, which is executing the process with the lowest priority, irrespective of whether each of the requested interrupt process and the processes being executed by the processors is a task process which is handled according to a predetermined schedule or an interrupt process which is handled independently of the schedule.

摘要翻译： 处理器包括：多个处理器; 处理和状态管理部分，其管理包括关于所述多个处理器的状态的信息的管理信息和由所述多个处理器执行的处理的优先级; 处理处理器选择部，其基于由处理和状态管理部管理的管理信息，选择正在执行具有最低优先级的处理的处理器之一; 以及中断控制部分，其将所请求的中断处理发送到所选择的处理器作为中断处理请求，其中处理处理器选择部分选择正在执行具有最低优先级的进程的处理器中的一个，而不管每个 请求的中断处理，并且由处理器执行的处理是根据预定时间表处理的任务处理或者独立于时间表处理的中断处理。

公开(公告)号：US08918024B2

公开(公告)日：2014-12-23

申请号：US13527202

申请日：2012-06-19

申请人： Kazuhiro Saito ,  Junji Murauchi ,  Tomohiro Kato ,  Tetsuya Kagawa ,  Hiroaki Takada

发明人： Kazuhiro Saito ,  Junji Murauchi ,  Tomohiro Kato ,  Tetsuya Kagawa ,  Hiroaki Takada

IPC分类号： G03G15/08 ,  G03G15/09

CPC分类号： G03G15/0893 ,  G03G15/09

摘要： A development device having: a main unit having formed therein a first space and a second space extending in a first direction perpendicular to a vertical direction, a first communicating portion and a second communicating portion that allow the first space and the second space to communicate with each other at both ends in the first direction; a first stirring member that extends in the first direction within the first space; a second stirring member that is positioned within the first space between the first stirring member and the second space and extends in the first direction; a conveyance member that extends in the first direction within the second space; and a developer support member that extends in the first direction within the second space.

摘要翻译： 一种显影装置，具有：主单元，其中形成有第一空间和沿垂直于垂直方向的第一方向延伸的第二空间;第一连通部和第二连通部，其允许第一空间和第二空间与第二空间连通; 彼此在第一方向的两端; 第一搅拌构件，其在所述第一空间内沿所述第一方向延伸; 第二搅拌构件，其位于第一搅拌构件和第二空间之间的第一空间内，并沿第一方向延伸; 输送构件，其在所述第二空间内沿所述第一方向延伸; 以及在所述第二空间内沿所述第一方向延伸的显影剂支撑构件。

公开(公告)号：US08233826B2

公开(公告)日：2012-07-31

申请号：US12820396

申请日：2010-06-22

申请人： Kazuhiro Saito ,  Junji Murauchi ,  Tetsuya Kagawa ,  Hiroaki Takada

发明人： Kazuhiro Saito ,  Junji Murauchi ,  Tetsuya Kagawa ,  Hiroaki Takada

IPC分类号： G03G15/08

CPC分类号： G03G15/0822 ,  G03G2215/0822

摘要： A housing of a developing apparatus is provided with a conveying member in a developer supplying and recovering portion, and two agitating members rotating in the same direction respectively as viewing rotating shafts from a near side in an axial direction, in a developer agitating portion. A guide is provided in an inner bottom surface of the housing between two agitating members. A braking portion suppressing a discharge of a developer is provided in a downstream side of the developer agitating portion in a developer conveying direction of the first agitating member, and a discharge portion is provided in a downstream side of a disc of the braking portion.

摘要翻译： 显影装置的壳体在显影剂供应和回收部分中设置有输送构件，并且在显影剂搅拌部分中分别具有两个在观察旋转轴上从轴向近侧沿相同方向旋转的搅拌构件。 引导件设置在两个搅拌构件之间的壳体的内底表面中。 在第一搅拌构件的显影剂输送方向上，在显影剂搅拌部的下游侧设有抑制显影剂排出的制动部，在制动部的盘的下游侧设置有排出部。

公开(公告)号：US08219007B2

公开(公告)日：2012-07-10

申请号：US12820189

申请日：2010-06-22

申请人： Junji Murauchi ,  Chikara Tsutsui ,  Tetsuya Kagawa ,  Hiroaki Takada

发明人： Junji Murauchi ,  Chikara Tsutsui ,  Tetsuya Kagawa ,  Hiroaki Takada

IPC分类号： G03G15/08

CPC分类号： G03G15/0887 ,  G03G15/0853 ,  G03G15/0893 ,  G03G2215/0822 ,  G03G2215/0838

摘要： A housing of a developing apparatus is provided with a conveying member and two agitating members. A guide is provided in an inner bottom surface of the housing between two agitating members. A guide is formed into a mountain shape with wide foot portion in a cross sectional shape which is orthogonal to an axial direction of rotating shafts of the agitating members. The guide is arranged in such a manner that a gap between respective outermost portions of two agitating members, and an inner bottom surface of the housing and the guide becomes equal to or more than 1.5 mm and less than 3 mm. Further, each of two agitating members rotates in a direction from the below to the above at a position of the guide.

摘要翻译： 显影装置的壳体设置有输送构件和两个搅拌构件。 引导件设置在两个搅拌构件之间的壳体的内底表面中。 引导件形成为具有宽的脚部的山形，其横截面形状与搅拌构件的旋转轴的轴向正交。 引导件布置成使得两个搅拌构件的相应最外部分之间的间隙以及壳体和引导件的内底表面等于或大于1.5mm且小于3mm。 此外，两个搅拌构件中的每一个在引导件的位置处从下到上的方向旋转。

公开(公告)号：US20110085547A1

公开(公告)日：2011-04-14

申请号：US12996107

申请日：2009-07-10

申请人： Hiroaki Takada ,  Ryo Kurachi ,  Yukihiro Miyashita

发明人： Hiroaki Takada ,  Ryo Kurachi ,  Yukihiro Miyashita

IPC分类号： H04L12/28

CPC分类号： H04L12/4625 ,  H04L2012/40273

摘要： Relay apparatuses read the attribute values of data, i.e., numerical information representing measurement values, calculation values, control values, etc., from receive buffers in which data received from ECUs connected thereto is stored, and create trunk frames containing the numerical information and transmit and receive trunk frames via trunk lines. The relay apparatuses derive numerical information from trunk frames received from the other relay apparatuses and renew the numerical information on the data stored in their respective databases using the derived numerical information.

摘要翻译： 继电器从存储从连接有ECU的数据接收到的数据的接收缓冲器读取数据的属性值，即表示测量值，计算值，控制值等的数值信息，并创建包含数字信息和发送 并通过中继线接收中继帧。 中继装置从其他中继装置接收到的中继帧导出数值信息，并使用导出的数值信息更新存储在各自数据库中的数据的数值信息。

公开(公告)号：US07543307B2

公开(公告)日：2009-06-02

申请号：US10620615

申请日：2003-07-17

申请人： Hiroshi Oyama ,  Hiroaki Takada ,  Morio Fukushima

发明人： Hiroshi Oyama ,  Hiroaki Takada ,  Morio Fukushima

IPC分类号： G06F3/00 ,  G06F9/44 ,  G06F9/46 ,  G06F13/00

CPC分类号： G06F17/5045 ,  G06F7/582

摘要： An interface is defined using an interface definition language, some portion of which is common to an interface definition language directed to a software object and a means for defining a function name, an argument, and a return value for each function. A server interface for realizing the interface comprises means for inputting for identifying a function name described in the interface definition language, means for inputting and outputting an argument, and means for outputting a return value.

摘要翻译： 使用接口定义语言定义接口，其中一些部分对于指向软件对象的接口定义语言是常见的，以及用于定义每个功能的函数名称，参数和返回值的手段。 用于实现接口的服务器接口包括用于输入用于识别以接口定义语言描述的功能名称的装置，用于输入和输出参数的装置，以及用于输出返回值的装置。

公开(公告)号：US20060279972A1

公开(公告)日：2006-12-14

申请号：US11448662

申请日：2006-06-08

申请人： Geliang Shao ,  Hiroaki Takada

发明人： Geliang Shao ,  Hiroaki Takada

IPC分类号： H02M7/217 ,  H02M3/335

CPC分类号： H02M3/33592 ,  Y02B70/1475

摘要： A synchronized rectification circuit and a switching power supply device having little power loss with respect to a wide range of input voltages and having a high efficiency, comprising first and second switch elements, first and second capacitors connected with each other capable to equalize held voltages thereof in response to sift of an input AC voltage to intermediate voltage (for example 0V), a first driving circuit for turning on a switch element according to the held voltage changed in response to shift the input AC voltage to 0V from a negative polarity voltage and turning off the switch element earlier than a time where the input voltage shifts to the negative polarity voltage from 0V, and a second driving circuit to drive a switch element in the same way but in reverse phase.

摘要翻译： 一种同步整流电路和开关电源装置，其相对于宽范围的输入电压具有很小的功率损耗并且具有高效率，包括第一和第二开关元件，彼此连接的第一和第二电容器，其能够使其保持的电压相等 响应于将输入AC电压筛选到中间电压（例如0V），根据保持的电压来接通开关元件的第一驱动电路响应于从负极性电压将输入AC电压移动到0V而改变， 在输入电压从0V转移到负极性电压的时间之前关闭开关元件，以及驱动开关元件的第二驱动电路以相同的方式但是以相反的方式驱动开关元件。

公开(公告)号：US08942602B2

公开(公告)日：2015-01-27

申请号：US13726816

申请日：2012-12-26

申请人： Wataru Onoda ,  Tomohiro Kato ,  Tomohisa Yoshida ,  Dai Suwama ,  Hiroaki Takada

发明人： Wataru Onoda ,  Tomohiro Kato ,  Tomohisa Yoshida ,  Dai Suwama ,  Hiroaki Takada

IPC分类号： G03G15/08

CPC分类号： G03G15/0877 ,  G03G15/081 ,  G03G15/0921

摘要： A developing device having: a guide member creating a guide channel for guiding the developer being fed thereto while being supported on the developer support; and a regulating member regulating the amount of the developer that has passed through the guide channel, the guide member further creates a reflux channel in a gap from an inner surface of the housing, the reflux channel is connected to the guide channel via a communication channel such that the developer regulated by the regulating member returns toward an upstream end of the guide member, the upstream end of the guide member is disposed in a position opposed to the position where the magnetic flux density of the catch pole peaks, and the magnet assembly further includes a feeding pole that is disposed downstream of the catch pole and upstream of the developing pole, so as to be opposed to the guide channel.

摘要翻译： 一种显影装置，具有：引导构件，其形成用于引导被供给到其上的显影剂的引导通道，同时支撑在显影剂载体上; 以及调节部件，其调节已经通过所述引导通道的显影剂的量，所述引导部件还在所述壳体的内表面的间隙中形成回流通道，所述回流通道经由连通通道 使得由调节构件调节的显影剂朝向引导构件的上游端返回，引导构件的上游端设置在与捕获极的磁通密度峰值的位置相对的位置，并且磁体组件 进一步包括供给杆，其设置在所述止动杆的下游并且在所述显影极的上游，以与所述引导通道相对。