公开(公告)号：US20240258991A1

公开(公告)日：2024-08-01

申请号：US18160877

申请日：2023-01-27

Applicant: Akoustis, Inc.

Inventor： Kenneth Fallon ,  Carlos R. Padilla ,  Mary Winters ,  Robert Charles Dry ,  Ethan Gram ,  Westbrook Hoose

IPC: H03H9/10 ,  H03H3/02 ,  H03H9/05 ,  H03H9/17

CPC classification number: H03H9/105 ,  H03H3/02 ,  H03H9/0523 ,  H03H9/173

Abstract: A wafer including an array of bulk acoustic wave resonator devices can include a first bulk acoustic wave resonator device on the wafer, the first bulk acoustic wave resonator device including a passivation layer on a piezoelectric layer, a second bulk acoustic wave resonator device on the wafer directly adjacent to the first bulk acoustic wave resonator device, the second bulk acoustic wave resonator device including the passivation layer and the piezoelectric layer, a wall layer on the wafer forming first and second wall cavity structures that extend around the first and second bulk acoustic wave resonator devices, respectively, a capping layer extending over the wall layer to cover the first and second wall cavity structures that include the first and second bulk acoustic wave resonator devices, respectively, a metallization layer coupling together bulk acoustic wave resonators included in the first or second bulk acoustic wave resonator device and a pillar that protrudes vertically from the metallization layer to contact the cap layer.

公开(公告)号：US11424728B2

公开(公告)日：2022-08-23

申请号：US16901539

申请日：2020-06-15

Applicant: Akoustis, Inc.

Inventor： Dae Ho Kim ,  Mary Winters ,  Kenneth Fallon ,  Jeffrey B. Shealy

IPC: H03H3/02 ,  H03H9/10 ,  H03H9/13 ,  H03H9/17 ,  H03H9/54 ,  H01L41/047 ,  H01L41/053 ,  H01L41/08 ,  H01L41/18 ,  H01L41/23 ,  H01L41/29 ,  H01L41/317 ,  H01L41/337 ,  H03H9/02 ,  H03H9/05

Abstract: A method and structure for a transfer process for an acoustic resonator device. In an example, a bulk acoustic wave resonator (BAWR) with an air reflection cavity is formed. A piezoelectric thin film is grown on a crystalline substrate. One or more patterned electrodes are deposited on the surface of the piezoelectric film. An etched sacrificial layer is deposited over the one or more electrodes and a planarized support layer is deposited over the sacrificial layer. The support layer is etched to form one or more cavities overlying the electrodes to expose the sacrificial layer. The sacrificial layer is etched to release the cavities around the electrodes. Then, a cap layer is fusion bonded to the support layer to enclose the electrodes in the support layer cavities.