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公开(公告)号:US20230345836A1
公开(公告)日:2023-10-26
申请号:US17886854
申请日:2022-08-12
发明人: Ming GAO , Lizhong SUN , Xiaodong YANG
IPC分类号: H01L41/319 , H01L41/316 , H01L41/08 , H01L41/083
CPC分类号: H01L41/319 , H01L41/316 , H01L41/0815 , H01L41/083
摘要: A method of reducing surface defects of a piezoelectric film layer includes depositing a first seed layer on a substrate, depositing an intermediate film layer on the first seed layer at a first temperature of approximately 350 degrees Celsius to approximately 700 degrees Celsius, depositing a second seed layer on the intermediate film layer, and depositing a piezoelectric film layer at a second temperature of less than 200 degrees Celsius. The piezoelectric film layer has a surface cone defect count of less than or equal to 2 per 100 microns2 of surface area of the piezoelectric film layer. In some embodiments, no vacuum breaks occur between depositions of the first seed layer, the intermediate film layer, the second seed layer, and the piezoelectric film layer.
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公开(公告)号:US11800808B2
公开(公告)日:2023-10-24
申请号:US16942813
申请日:2020-07-30
IPC分类号: H01L41/187 , H01L41/27 , H01L41/08 , H01L41/314 , H10N30/853 , H10N30/05 , H10N30/074 , H10N30/00
CPC分类号: H10N30/8542 , H10N30/05 , H10N30/074 , H10N30/10516
摘要: There is provided a piezoelectric stack, including: a substrate; an electrode film; and a piezoelectric film which is comprised of alkali niobium oxide of a perovskite structure represented by a composition formula of (K1-xNax)NbO3 (0
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公开(公告)号:US11730058B2
公开(公告)日:2023-08-15
申请号:US16413839
申请日:2019-05-16
发明人: Alexander Kalnitsky , Chun-Ren Cheng , Chi-Yuan Shih , Kai-Fung Chang , Shih-Fen Huang , Yi-Chuan Teng , Yi Heng Tsai , You-Ru Lin , Yan-Jie Liao
IPC分类号: H01L41/193 , H01L41/08 , H01L41/113 , D01F6/62 , H10N30/00 , H10N30/04 , H10N30/067 , H10N30/87 , H10N30/063
CPC分类号: H10N30/10513 , H10N30/04 , H10N30/067 , H10N30/877 , H10N30/063
摘要: In some embodiments, a piezoelectric device is provided. The piezoelectric device includes a semiconductor substrate. A first electrode is disposed over the semiconductor substrate. A piezoelectric structure is disposed on the first electrode. A second electrode is disposed on the piezoelectric structure. A heating element is disposed over the semiconductor substrate. The heating element is configured to heat the piezoelectric structure to a recovery temperature for a period of time, where heating the piezoelectric structure to the recovery temperature for the period of time improves a degraded electrical property of the piezoelectric device.
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公开(公告)号:US11723279B2
公开(公告)日:2023-08-08
申请号:US16307749
申请日:2017-06-05
IPC分类号: H01L41/193 , H01L41/08 , H01L41/113 , D01F6/62 , H10N30/857 , C08G63/08 , C08L67/04 , G01L1/16 , H10N30/08 , H10N30/20 , H10N30/30 , H10N30/60 , H10N30/072 , H10N30/084 , H10N30/088 , H10N30/098 , H10N30/00
CPC分类号: H10N30/857 , C08G63/08 , C08L67/04 , D01F6/625 , G01L1/16 , H10N30/072 , H10N30/08 , H10N30/084 , H10N30/088 , H10N30/098 , H10N30/1061 , H10N30/20 , H10N30/30 , H10N30/302 , H10N30/60
摘要: The present invention provides: a piezoelectric substrate which includes a first piezoelectric body having an elongated shape and helically wound in one direction, and which does not include a core material, in which the first piezoelectric body includes a helical chiral polymer (A) having an optical activity; in which the length direction of the first piezoelectric body is substantially parallel to the main direction of orientation of the helical chiral polymer (A) included in the first piezoelectric body; and in which the first piezoelectric body has a degree of orientation F, as measured by X-ray diffraction according to the following Equation (a), within the range of 0.5 or more but less than 1.0:
degree of orientation F=(180°−α)/180° (a)
(in which α represents the half-value width of the peak derived from the orientation).-
公开(公告)号:US11706992B2
公开(公告)日:2023-07-18
申请号:US16646133
申请日:2019-09-27
发明人: Xiaowu Sun , Junxiang Lu , Jie Huang , Jianshu Wang , Peitao Zhu , Yajiao Zhang , Ting Chen , Song Hu
CPC分类号: H10N39/00 , H02N2/0075 , H10N30/20 , H10N30/802 , H10N30/857
摘要: Provided are a flexible body and a method for controlling the flexible body to deform. The flexible body comprises one or more flexible units, wherein each of the flexible units comprises: a first electrode, a second electrode, an electroactive polymer layer, and a thin film transistor, wherein a source electrode or a drain electrode of the thin film transistor is electrically connected to the second electrode. The first electrode and the second electrode are configured to provide an electric field acting on the electroactive polymer layer, and the electroactive polymer layer is configured to deform in response to the electric field provided by the first electrode and the second electrode.
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公开(公告)号:US20230113584A1
公开(公告)日:2023-04-13
申请号:US17938118
申请日:2022-10-05
IPC分类号: H01L41/319 , H01L41/08 , H01L41/187 , H01L41/316 , H03H9/02 , H03H9/17 , H03H9/56 , H03H9/25 , H03H9/64
摘要: A piezoelectric film on a substrate is provided comprising an aluminum nitride (AlN) layer, and a Al1-x(J)xN compound layer comprising a graded section with a lower (J) composition, x, adjacent to the AlN layer and a higher (J) composition, x, located away from the AlN layer, the said (J) being a singular element or a binary compound. A method for forming such a piezoelectric film is also provided. A surface acoustic wave resonator comprising such a piezoelectric film, a surface acoustic wave filter comprising such a piezoelectric film, a bulk acoustic wave resonator comprising such a piezoelectric film, and a bulk acoustic wave filter comprising such a piezoelectric film are also provided.
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公开(公告)号:US11616488B2
公开(公告)日:2023-03-28
申请号:US16326590
申请日:2016-09-30
申请人: INTEL CORPORATION
IPC分类号: H03H9/205 , H03H3/02 , H03H9/58 , H03H9/60 , H03H9/17 , H01L27/20 , H01L41/08 , H01L41/187 , H01L41/29 , H01L41/316 , H03H9/02
摘要: An integrated circuit film bulk acoustic resonator (FBAR) device having multiple resonator thicknesses is formed on a common substrate in a stacked configuration. In an embodiment, a seed layer is deposited on a substrate, and one or more multi-layer stacks are deposited on the seed layer, each multi-layer stack having a first metal layer deposited on a first sacrificial layer, and a second metal layer deposited on a second sacrificial layer. The second sacrificial layer can be removed and the resulting space is filled in with a piezoelectric material, and the first sacrificial layer can be removed to release the piezoelectric material from the substrate and suspend the piezoelectric material above the substrate. More than one multi-layer stack can be added, each having a unique resonant frequency. Thus, multiple resonator thicknesses can be achieved on a common substrate, and hence, multiple resonant frequencies on that same substrate.
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公开(公告)号:US11600765B2
公开(公告)日:2023-03-07
申请号:US17137220
申请日:2020-12-29
发明人: Domenico Giusti , Carlo Luigi Prelini , Marco Ferrera , Carla Maria Lazzari , Luca Seghizzi , Nicolo′ Boni , Roberto Carminati , Fabio Quaglia
摘要: The MEMS actuator is formed by a substrate, which surrounds a cavity; by a deformable structure suspended on the cavity; by an actuation structure formed by a first piezoelectric region of a first piezoelectric material, supported by the deformable structure and configured to cause a deformation of the deformable structure; and by a detection structure formed by a second piezoelectric region of a second piezoelectric material, supported by the deformable structure and configured to detect the deformation of the deformable structure.
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公开(公告)号:US11590536B2
公开(公告)日:2023-02-28
申请号:US16274477
申请日:2019-02-13
发明人: Yu-Feng Jin , Sheng-Lin Ma , Qian-Cheng Zhao , Yi-Hsiang Chiu , Huan Liu , Hung-Ping Lee , Dan Gong
IPC分类号: B06B3/00 , B06B1/06 , H01L41/083 , H01L41/08 , H01L41/277 , H01L41/332 , H01L41/337 , H01L41/338 , G06K9/00 , G06V40/13
摘要: A wafer level ultrasonic chip module includes a substrate, a composite layer, a conducting material, and a base material. The substrate has a through slot that passes through an upper surface of the substrate and a lower surface of the substrate. The composite layer includes an ultrasonic body and a protective layer. A lower surface of the ultrasonic body is exposed from the through slot. The protective layer covers the ultrasonic body and a partial upper surface of the substrate. The protective layer has an opening, from which a partial upper surface of the ultrasonic body is exposed. The conducting material is in contact with the upper surface of the ultrasonic body. The base material covers the through slot, such that a space is formed among the through slot, the lower surface of the ultrasonic body and an upper surface of the base material.
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公开(公告)号:US20230055097A1
公开(公告)日:2023-02-23
申请号:US17875623
申请日:2022-07-28
申请人: TDK Corporation
发明人: Junpei MORISHITA
IPC分类号: H01L41/08 , H01L41/314 , H01L41/09
摘要: A piezoelectric thin film contains a lower layer and a first piezoelectric layer stacked on the lower layer. The first piezoelectric layer contains a tetragonal crystal 1 of a perovskite-type oxide. A (001) plane of the tetragonal crystal 1 is oriented in a normal direction dn of a surface of the first piezoelectric layer. A spacing of (100) planes of the tetragonal crystal 1 is a1. A spacing of (100) planes of a crystal contained in the lower layer is aL. A lattice mismatch rate between the first piezoelectric layer and the lower layer is 100×(aL−a1)/a1. The lattice mismatch rate is 3.0 to 12.1%. A rocking curve of diffracted X-rays of the (001) plane of the tetragonal crystal 1 is measured in an out-of-plane direction of the surface of the first piezoelectric layer. A FWHM of the rocking curve is 1.9 to 5.5°.
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