Method of programming a non-volatile memory cell to eliminate or to minimize program deceleration
    1.
    发明申请
    Method of programming a non-volatile memory cell to eliminate or to minimize program deceleration 有权
    编程非易失性存储单元以消除或最小化程序减速的方法

    公开(公告)号:US20050078526A1

    公开(公告)日:2005-04-14

    申请号:US10944584

    申请日:2004-09-16

    IPC分类号: G11C16/12 G11C11/34

    CPC分类号: G11C16/12

    摘要: A method to eliminate program deceleration and to enhance the resistance to program disturbance of a non-volatile floating gate memory cell is disclosed. This method eliminates or minimizes the impact of the hole displacement current. This can be done, for example, by increasing the rise time of the high programming voltage applied to the high voltage terminal. Alternatively, the transistor of the non-volatile floating gate memory cell can be turned off until the voltage applied to the high voltage terminal has reached the programming voltage. This can be done, for example by delaying the voltage applied to either the low voltage terminal or to the control gate to turn on the transistor until the voltage at the high voltage terminal has past the ramp up voltage and has reached a level programming voltage.

    摘要翻译: 公开了一种消除程序减速并增强对非易失性浮动栅极存储单元的编程干扰的阻力的方法。 该方法消除或最小化孔位移电流的影响。 这可以通过例如增加施加到高电压端子的高编程电压的上升时间来实现。 或者,非易失性浮栅存储单元的晶体管可以被截止,直到施加到高电压端子的电压达到编程电压。 这可以通过例如通过延迟施加到低电压端子或控制栅极的电压来导通晶体管,直到高压端子处的电压已经超过斜坡上升电压并达到电平编程电压。

    Method of programming a non-volatile memory cell to eliminate or to minimize program deceleration
    2.
    发明授权
    Method of programming a non-volatile memory cell to eliminate or to minimize program deceleration 有权
    编程非易失性存储单元以消除或最小化程序减速的方法

    公开(公告)号:US07102930B2

    公开(公告)日:2006-09-05

    申请号:US10944584

    申请日:2004-09-16

    IPC分类号: G11C16/04

    CPC分类号: G11C16/12

    摘要: A method to eliminate program deceleration and to enhance the resistance to program disturbance of a non-volatile floating gate memory cell is disclosed. This method eliminates or minimizes the impact of the hole displacement current. This can be done, for example, by increasing the rise time of the high programming voltage applied to the high voltage terminal. Alternatively, the transistor of the non-volatile floating gate memory cell can be turned off until the voltage applied to the high voltage terminal has reached the programming voltage. This can be done, for example by delaying the voltage applied to either the low voltage terminal or to the control gate to turn on the transistor until the voltage at the high voltage terminal has past the ramp up voltage and has reached a level programming voltage.

    摘要翻译: 公开了一种消除程序减速并增强对非易失性浮动栅极存储单元的编程干扰的阻力的方法。 该方法消除或最小化孔位移电流的影响。 这可以通过例如增加施加到高电压端子的高编程电压的上升时间来实现。 或者,非易失性浮栅存储单元的晶体管可以被截止,直到施加到高电压端子的电压达到编程电压。 这可以通过例如通过延迟施加到低电压端子或控制栅极的电压来导通晶体管,直到高压端子处的电压已经超过斜坡上升电压并达到电平编程电压。

    Method of programming a non-volatile memory cell by controlling the channel current during the rise period
    3.
    发明授权
    Method of programming a non-volatile memory cell by controlling the channel current during the rise period 有权
    通过在上升期间控制通道电流来对非易失性存储单元进行编程的方法

    公开(公告)号:US07263005B2

    公开(公告)日:2007-08-28

    申请号:US11487135

    申请日:2006-07-14

    IPC分类号: G11C16/04

    CPC分类号: G11C16/12

    摘要: A method to eliminate program deceleration and to enhance the resistance to program disturbance of a non-volatile floating gate memory cell is disclosed. This method eliminates or minimizes the impact of the hole displacement current. This can be done, for example, by increasing the rise time of the high programming voltage applied to the high voltage terminal. Alternatively, the transistor of the non-volatile floating gate memory cell can be turned off until the voltage applied to the high voltage terminal has reached the programming voltage. This can be done, for example by delaying the voltage applied to either the low voltage terminal or to the control gate to turn on the transistor until the voltage at the high voltage terminal has past the ramp up voltage and has reached a level programming voltage.

    摘要翻译: 公开了一种消除程序减速并增强对非易失性浮动栅极存储单元的编程干扰的阻力的方法。 该方法消除或最小化孔位移电流的影响。 这可以通过例如增加施加到高电压端子的高编程电压的上升时间来实现。 或者,非易失性浮栅存储单元的晶体管可以被截止,直到施加到高电压端子的电压达到编程电压。 这可以通过例如通过延迟施加到低电压端子或控制栅极的电压来导通晶体管,直到高压端子处的电压已经超过斜坡上升电压并达到电平编程电压。