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1.发明授权
公开(公告)号：US5448770A
公开(公告)日：1995-09-05
申请号：US42956
申请日：1993-04-05
摘要： A TC controlled RF signal detecting circuitry (211) used in the output power control circuit of a TDMA RF signal power amplifier includes positive coefficient current source (303) producing current I+ having a positive TC, negative coefficient current source (305) producing current I- having a negative TC, and current mirror (301) for summing currents I+ and I- to produce substantially identical compensated mirror currents Im1 and Im2. Anti-clamping current mirror (309) mirrors current Im2 to produce compensated currents Ia1 and Ia2, which are applied to and bias a Schottky diode coupled in series to a resistor network in each leg of diode detector (311). Each leg of diode detector (311) has a positive TC, which is substantially offset by the negative TC of compensated currents Ia1 and Ia2. Schottky diode (431) in one leg of diode detector (311) half-wave rectifies RF feedback signal (212) to produce temperature and voltage compensated power level signal (229), which has a DC level proportional to the output power level of RF output signal (214). By using TC controlled RF signal detecting circuitry (211), power level signal (229) has a DC level which is stable to within 5 mV over temperature ranging from -55.degree. C. to +125.degree. C. and over power supply voltage ranging from 2.7 V to 4.75 V.
摘要翻译： 在TDMA RF信号功率放大器的输出功率控制电路中使用的TC控制的RF信号检测电路（211）包括产生具有正的TC的电流I +的正系数电流源（303），负的系数电流源（305）产生电流I - 具有负的TC和电流镜（301），用于对电流I +和I求和，以产生基本上相同的补偿后的反射镜电流Im1和Im2。 抗钳位电流镜（309）反射电流Im2以产生补偿电流Ia1和Ia2，其施加到二极管检测器（311）的每个支路中并联耦合到电阻器网络的肖特基二极管并将其偏置。 二极管检测器（311）的每条支路具有正的TC，其基本上被补偿电流Ia1和Ia2的负TC偏移。 二极管检测器（311）的一条支路中的肖特基二极管（431）对RF反馈信号（212）半波整流，以产生温度和电压补偿功率电平信号（229），其具有与RF的输出功率电平成比例的DC电平 输出信号（214）。 通过使用TC控制的RF信号检测电路（211），功率电平信号（229）具有在-55℃至+125℃的温度范围内稳定在5mV内的DC电平，以及超过电源电压范围 从2.7 V到4.75 V.
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2.发明授权Amplifier input stage with charge pump supplying a differential transistor pair 失效具有电荷泵的放大器输入级提供差分晶体管对
公开(公告)号：US5422600A
公开(公告)日：1995-06-06
申请号：US264290
申请日：1994-06-23
IPC分类号： H03F3/45
CPC分类号： H03F3/45094 , H03F2203/45028 , H03F2203/45124 , H03F2203/45476 , H03F2203/45648 , H03F2203/45674
摘要： An input stage to an amplifier circuit (10) operating with a one volt power supply potential (32) receives a differential input signal. A charge pump (36) increases the one volt power supply potential to 1.8 volts for providing additional head-room for the differential input signal. A current source (44) controls a current mirror (40-42) to draw a predetermined current from the charge pump to supply the active conduction path of a differential transistor pair (12-14). An output stage (34) of the amplifier circuit operates off the one volt power supply potential. Since the charge pump drives only the differential transistor pair through the current mirror, it may be made small to fit on the same integrated circuit as the amplifier including any necessary pump capacitors.
摘要翻译： 用一伏电源电位（32）工作的放大器电路（10）的输入级接收差分输入信号。 电荷泵（36）将一伏特电源电位增加到1.8伏，为差分输入信号提供额外的头部空间。 电流源（44）控制电流镜（40-42）从电荷泵吸取预定电流以提供差动晶体管对（12-14）的有源导通路径。 放大器电路的输出级（34）操作一伏特电源电位。 由于电荷泵仅驱动通过电流镜的差分晶体管对，所以可以使其小到与包括任何必需的泵电容器的放大器相同的集成电路。
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公开(公告)号：US5471174A
公开(公告)日：1995-11-28
申请号：US349578
申请日：1994-12-05
摘要： An amplifier circuit (10) receives a differential input signal and provides an amplified differential signal. A converter circuit (14) is responsive to the amplified differential signal and provides a single-ended signal. An output stage (16) is responsive to the single-ended signal for providing an output signal of the amplifier circuit. The output stage provides bias cancellation for the single-ended signal by injecting a current equal to the bias requirement of the input transistors (20, 38). The bias cancellation maintains a high input impedance and high gain and output drive for the output stage.
摘要翻译： 放大器电路（10）接收差分输入信号并提供放大的差分信号。 A转换器电路（14）响应放大的差分信号并提供单端信号。 输出级（16）响应于单端信号以提供放大器电路的输出信号。 输出级通过注入等于输入晶体管（20,38）的偏置要求的电流来为单端信号提供偏置消除。 偏置消除在输出级保持高输入阻抗和高增益和输出驱动。
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公开(公告)号：US5422559A
公开(公告)日：1995-06-06
申请号：US161627
申请日：1993-12-06
CPC分类号： H02J7/008
摘要： A pulsed battery charger circuit (11) for charging a battery (28). A control circuit (17) is responsive to a sense circuit (16) that monitors the battery voltage. The control circuit (17) pulses a first current source (25) or a second current source (20). An amplifier (14) is responsive to the first (25) and second (20) current sources for generating first and second predetermined voltages between a drive output (12) and a sense input (13). The first current source (25) is pulsed when the sense circuit (16) senses the battery voltage to be less than a first threshold voltage. The second current source (20) is pulsed when the sense circuit (16) senses the battery voltage to be greater than the first threshold voltage. Both the first (25) and second (20) current sources are disabled when the sense circuit (16) senses the battery voltage to be greater than a second threshold voltage.
摘要翻译： 一种用于对电池（28）充电的脉冲电池充电器电路（11）。 控制电路（17）响应监视电池电压的检测电路（16）。 控制电路（17）对第一电流源（25）或第二电流源（20）进行脉冲。 放大器（14）响应于第一（25）和第二（20）电流源，用于在驱动输出（12）和感测输入（13）之间产生第一和第二预定电压。 当感测电路（16）感测到电池电压小于第一阈值电压时，第一电流源（25）是脉冲的。 当感测电路（16）感测到电池电压大于第一阈值电压时，第二电流源（20）被脉冲。 当感测电路（16）感测到电池电压大于第二阈值电压时，第一（25）和第二（20）电流源都被禁用。
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公开(公告)号：US5285170A
公开(公告)日：1994-02-08
申请号：US983357
申请日：1992-11-30
CPC分类号： H03F3/3088
摘要： An operational amplifier achieves higher operating speed by using an all NPN transistor output drive stage. A control circuit in output drive stage receives an input signal and providing first and second control signals. The first and second control signals in turn drive first and second NPN output drive transistors arranged in a totem pole configuration between first and second power supply conductors.
摘要翻译： 运算放大器通过使用全NPN晶体管输出驱动级实现更高的工作速度。 输出驱动级中的控制电路接收输入信号并提供第一和第二控制信号。 第一和第二控制信号又驱动以第一和第二电源导体之间的图腾柱结构排列的第一和第二NPN输出驱动晶体管。
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公开(公告)号：US5521488A
公开(公告)日：1996-05-28
申请号：US179633
申请日：1994-01-10
CPC分类号： H02M3/1563
摘要： A voltage regulator (11) having an input (12) for receiving an input current and an output (13) for providing a regulated voltage. The voltage regulator (11) comprising a diode (14), a capacitor (16), a first comparator (17), a second comparator (18), a logic circuit (19), and a switch circuit (21). The capacitor (16) is charged by the input current coupled through the diode (14). The first comparator (17) senses when the voltage on the capacitor (16) exceeds a first reference voltage and provides a signal to the logic circuit (19). The logic circuit (19) enables the switch circuit (21) for shunting the input current from charging the capacitor (19). The second comparator (18) senses when the voltage on the capacitor (16) falls below a second reference voltage and provides a signal to the logic circuit (19). The logic circuit (19) disables the switch circuit (21) from shunting the input current thereby charging the capacitor (19). Thus, the voltage at output (13) stays between the first and second predetermined voltages.
摘要翻译： 具有用于接收输入电流的输入端（12）和用于提供调节电压的输出（13）的电压调节器（11）。 电压调节器（11）包括二极管（14），电容器（16），第一比较器（17），第二比较器（18），逻辑电路（19）和开关电路（21）。 电容器（16）由通过二极管（14）耦合的输入电流充电。 第一比较器（17）感测电容器（16）上的电压何时超过第一参考电压并且向逻辑电路（19）提供信号。 逻辑电路（19）使得开关电路（21）能够使输入电流分流以对电容器（19）充电。 第二比较器（18）感测电容器（16）上的电压何时低于第二参考电压并且向逻辑电路（19）提供信号。 逻辑电路（19）禁止开关电路（21）分流输入电流，从而对电容器（19）充电。 因此，输出（13）处的电压保持在第一和第二预定电压之间。
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公开(公告)号：US06870422B2
公开(公告)日：2005-03-22
申请号：US10013581
申请日：2001-12-10
申请人： Troy L. Stockstad
发明人： Troy L. Stockstad
IPC分类号： H03K19/0175 , H03F3/45
CPC分类号： H03F3/45192 , H03F2203/45342 , H03F2203/45612
摘要： The present invention discloses a low voltage rail-to-rail CMOS input stage. The input stage includes a differential pail of P-channel metal oxide semiconductor field effect (PMOS) transistors, which produces differential output current signal. The input stage further includes a pair of N-channel depletion-mode metal oxide semiconductor field effect (NMOS) transistors, coupled to the bulk terminals of the differential pair of PMOS transistors, for receiving an input signal. The depletion-mode NMOS transistors further act as source follower devices to drive the bulk terminals of the differential pair of PMOS transistors.
摘要翻译： 本发明公开了一种低电压轨至轨CMOS输入级。 输入级包括产生差分输出电流信号的P沟道金属氧化物半导体场效应（PMOS）晶体管的差分桶。 输入级还包括耦合到PMOS晶体管的差分对的体电极的一对N沟道耗尽型金属氧化物半导体场效应（NMOS）晶体管，用于接收输入信号。 耗尽型NMOS晶体管还用作源极跟随器件来驱动差分PMOS晶体管的体端子。
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公开(公告)号：US06788506B1
公开(公告)日：2004-09-07
申请号：US09711420
申请日：2000-11-13
申请人： Troy L. Stockstad
发明人： Troy L. Stockstad
IPC分类号： H02H900
CPC分类号： H03K5/08
摘要： An integrated circuit includes circuit nodes (111 and 131), a resistor (210) coupling together the nodes, a comparator (230) having two inputs and an output where a first one of the two inputs is coupled to the resistor and a first one of the nodes, and a three-terminal device (220) having a first terminal coupled to a second one of the nodes and the resistor and also having a second terminal coupled to the output of the comparator.
摘要翻译： 集成电路包括电路节点（111和131），将节点耦合在一起的电阻器（210），具有两个输入的比较器（230）和两个输入端中的第一个耦合到电阻器的输出端和第一个 以及具有耦合到所述节点中的第二节点和所述电阻器的第一端子并且还具有耦合到所述比较器的输出的第二端子的三端子装置（220）。
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公开(公告)号：US5675268A
公开(公告)日：1997-10-07
申请号：US538522
申请日：1995-10-03
IPC分类号： H03K17/082 , H03K5/153 , H03K5/22
CPC分类号： H03K17/0822
摘要： An overcurrent detector circuit (21) for a power MOSFET (22) is described. The overcurrent detector circuit (21) generates a bias voltage corresponding to the drain to source voltage of the power MOSFET (22). The drain to source voltage correlates directly to the current being conducted by the power MOSFET (22). An overcurrent condition occurs when the power MOSFET (22) exceeds a predetermined current. The bias voltage is applied to a transistor (24) for generating a current. A current source (29) couples to the transistor (24). The current provided by the transistor equals the reference current of the current source (29) when the power MOSFET conducts the predetermined current. The overcurrent detector circuit (21) generates a signal indicating a overcurrent condition does not exist when the reference current is greater the current provided by the transistor. Conversely, the overcurrent detector circuit (21) generates a signal indicating the overcurrent condition when the current provided by the transistor exceeds the reference current.
摘要翻译： 描述了用于功率MOSFET（22）的过电流检测器电路（21）。 过电流检测器电路（21）产生对应于功率MOSFET（22）的漏极 - 源极电压的偏置电压。 漏极到源极电压直接与由功率MOSFET（22）传导的电流相关。 当功率MOSFET（22）超过预定电流时，发生过电流状况。 偏置电压被施加到用于产生电流的晶体管（24）。 电流源（29）耦合到晶体管（24）。 当功率MOSFET导通预定电流时，由晶体管提供的电流等于电流源（29）的参考电流。 过电流检测器电路（21）产生指示当晶体管提供的电流的参考电流大时，过电流状态不存在的信号。 相反，当由晶体管提供的电流超过参考电流时，过电流检测器电路（21）产生指示过电流状况的信号。
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公开(公告)号：US06703894B1
公开(公告)日：2004-03-09
申请号：US10341158
申请日：2003-01-13
申请人： Troy L. Stockstad , Klaas Wortel
发明人： Troy L. Stockstad , Klaas Wortel
IPC分类号： H03B100
CPC分类号： H03H11/04 , H03H19/004
摘要： A filter circuit. In one embodiment, the filter circuit includes a continuous time (CT) filter, a switched capacitor (SWC) filter, and an SWC integrator. The CT filter is coupled to receive an input signal from an external source. The CT filter may be a low-pass filter. The SWC filter is coupled to receive an output signal from the CT filter, and provide an output information signal. The SWC filter may also be a low pass filter. A feedback loop may be present between the output of the SWC filter and the input of the CT filter. The SWC integrator samples the output signal from the SWC filter and provides an output signal to the CT filter. The output signal is combined with the input signal to the CT filter. A D.C. offset may be substantially removed from the information signal provided by the output of the SWC filter.
摘要翻译： 滤波电路。 在一个实施例中，滤波电路包括连续时间（CT）滤波器，开关电容器（SWC）滤波器和SWC积分器。 CT滤波器被耦合以从外部源接收输入信号。 CT滤波器可以是低通滤波器。 SWC滤波器被耦合以从CT滤波器接收输出信号，并提供输出信息信号。 SWC滤波器也可以是低通滤波器。 在SWC滤波器的输出和CT滤波器的输入之间可能存在反馈回路。 SWC积分器对SWC滤波器的输出信号进行采样，并向CT滤波器提供输出信号。 输出信号与CT滤波器的输入信号相结合。 可以从SWC滤波器的输出提供的信息信号中基本上去除直流偏移。
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