摘要:
A pulsed battery charger circuit (11) for charging a battery (28). A control circuit (17) is responsive to a sense circuit (16) that monitors the battery voltage. The control circuit (17) pulses a first current source (25) or a second current source (20). An amplifier (14) is responsive to the first (25) and second (20) current sources for generating first and second predetermined voltages between a drive output (12) and a sense input (13). The first current source (25) is pulsed when the sense circuit (16) senses the battery voltage to be less than a first threshold voltage. The second current source (20) is pulsed when the sense circuit (16) senses the battery voltage to be greater than the first threshold voltage. Both the first (25) and second (20) current sources are disabled when the sense circuit (16) senses the battery voltage to be greater than a second threshold voltage.
摘要:
A battery monitoring circuit (10) sequentially samples individual voltages across a string of serially coupled battery cells (12-18). A control circuit (32) controls first and second multiplexers (34,42) to sample each battery voltage for an over-voltage condition. A comparator (52) detects an over-voltage condition by comparing a divided down battery voltage against a reference. The conduction path through the battery cells is disabled upon detecting a fault condition by a transistor (26) in the battery cell conduction path. The battery cells are further sequentially sampled for an under-voltage fault. The comparator detects an under-voltage condition by comparing a second divided down battery voltage against the reference. The conduction path through the battery cells is disabled upon detecting a fault condition by a transistor (24) in the battery cell conduction path.
摘要:
An operational amplifier enhances its negative slew rate by providing more base current to a bottom PNP output drive transistor. A large signal applied at the inverting input of the operational amplifier unbalances the differential input stage and provides maximum current through a current mirror circuit to the base of the PNP output transistor. A transistor is biased on by sufficient current flow through the current mirror circuit to draw even more base current from the base of the PNP output transistor and thereby enhance its negative slew rate.
摘要:
A battery charger status monitor circuit (40) for monitoring the status of a battery (12) charged with current pulses. The current pulses charging the battery (12) are reduced in frequency and duty cycle as the battery approaches a fully charged condition. By monitoring the number of current pulses charging the battery within a predetermined time period, the charge status of the battery (12) is determined. If no pulses are detected within the predetermined time period, the battery (12) is fully charged. A counter (47) is incremented by a clock signal. A charge signal resets the counter (47). The charge signal corresponds to the current pulses charging the battery. If the counter (47) reaches a predetermined count, the clock and charge signals are disabled. Reaching the predetermined count before resetting indicates the battery (12) is fully charged. When the counter is below the predetermined count, the battery (12) is being charged.
摘要:
A voltage regulator (11) having an input (12) for receiving an input current and an output (13) for providing a regulated voltage. The voltage regulator (11) comprising a diode (14), a capacitor (16), a first comparator (17), a second comparator (18), a logic circuit (19), and a switch circuit (21). The capacitor (16) is charged by the input current coupled through the diode (14). The first comparator (17) senses when the voltage on the capacitor (16) exceeds a first reference voltage and provides a signal to the logic circuit (19). The logic circuit (19) enables the switch circuit (21) for shunting the input current from charging the capacitor (19). The second comparator (18) senses when the voltage on the capacitor (16) falls below a second reference voltage and provides a signal to the logic circuit (19). The logic circuit (19) disables the switch circuit (21) from shunting the input current thereby charging the capacitor (19). Thus, the voltage at output (13) stays between the first and second predetermined voltages.
摘要:
An amplifier circuit (10) receives a differential input signal and provides an amplified differential signal. A converter circuit (14) is responsive to the amplified differential signal and provides a single-ended signal. An output stage (16) is responsive to the single-ended signal for providing an output signal of the amplifier circuit. The output stage provides bias cancellation for the single-ended signal by injecting a current equal to the bias requirement of the input transistors (20, 38). The bias cancellation maintains a high input impedance and high gain and output drive for the output stage.
摘要:
An input stage to an amplifier circuit (10) operating with a one volt power supply potential (32) receives a differential input signal. A charge pump (36) increases the one volt power supply potential to 1.8 volts for providing additional head-room for the differential input signal. A current source (44) controls a current mirror (40-42) to draw a predetermined current from the charge pump to supply the active conduction path of a differential transistor pair (12-14). An output stage (34) of the amplifier circuit operates off the one volt power supply potential. Since the charge pump drives only the differential transistor pair through the current mirror, it may be made small to fit on the same integrated circuit as the amplifier including any necessary pump capacitors.
摘要:
An operational amplifier achieves higher operating speed by using an all NPN transistor output drive stage. A control circuit in output drive stage receives an input signal and providing first and second control signals. The first and second control signals in turn drive first and second NPN output drive transistors arranged in a totem pole configuration between first and second power supply conductors.
摘要:
A battery charge control circuit (10) senses the charge condition of cells in a battery pack (12, 14, 16, 18) using a measurement circuit (51). Upon detection of a single under-voltage cell, the charge control circuit is placed in a sleep mode. Pack sense circuit (240) senses when the battery pack is placed in a charger. If circuit (10) was in a sleep mode, it is awakened. If any cell is measured over-voltage, the status is checked versus the other cells. If all the cells are over-voltage, the battery is considered balanced. If one or more cells are not over-voltage, a control circuit (32) activates a discharge transistor (212, 214, 216, 218), discharging the cell within a hysteresis voltage below the over-voltage limit. Charge balancing of cells is continued until the cells are within a programmable hysteresis voltage of each other.
摘要:
An overcurrent detector circuit (21) for a power MOSFET (22) is described. The overcurrent detector circuit (21) generates a bias voltage corresponding to the drain to source voltage of the power MOSFET (22). The drain to source voltage correlates directly to the current being conducted by the power MOSFET (22). An overcurrent condition occurs when the power MOSFET (22) exceeds a predetermined current. The bias voltage is applied to a transistor (24) for generating a current. A current source (29) couples to the transistor (24). The current provided by the transistor equals the reference current of the current source (29) when the power MOSFET conducts the predetermined current. The overcurrent detector circuit (21) generates a signal indicating a overcurrent condition does not exist when the reference current is greater the current provided by the transistor. Conversely, the overcurrent detector circuit (21) generates a signal indicating the overcurrent condition when the current provided by the transistor exceeds the reference current.