中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

9 records (took 0.014 seconds)

    DUAL CIRCUIT DIGITAL ISOLATOR
    1.
    发明申请
    DUAL CIRCUIT DIGITAL ISOLATOR 有权

    公开(公告)号：US20230084169A1

    公开(公告)日：2023-03-16

    申请号：US18051151

    申请日：2022-10-31

    Applicant: Allegro MicroSystems, LLC

    Inventor： Sundar Chetlur ,  Maxim Klebanov ,  Cory Voisine ,  Kenneth Snowdon ,  Hsuan-Jung Wu

    IPC: H01L23/522 ,  H01L21/8234

    Abstract: An apparatus including; a substrate; an isolator that is formed over the substrate, the isolator including a silicon shield layer that is formed between a first buried oxide (BOX) layer and a second BOX layer; a silicon layer having an oxide trench structure formed therein, the oxide trench structure being arranged to define a first silicon island and a second silicon island; a first electronic circuit that is formed over the first silicon island; and a second electronic circuit that is formed over the second silicon island, the first electronic circuit being electrically coupled to the first electronic circuit.

    Signal isolator with three state data transmission
    2.
    发明授权
    Signal isolator with three state data transmission 有权

    公开(公告)号：US11115244B2

    公开(公告)日：2021-09-07

    申请号：US16809825

    申请日：2020-03-05

    Applicant: Allegro MicroSystems, LLC

    Inventor： Robert A. Briano ,  Pedram Sotoodeh Shahnani ,  Cory Voisine

    IPC: H04L25/02 ,  H04B17/17 ,  H03K19/00

    Abstract: A signal isolator integrated circuit package includes a first circuit having a first input and a first output, a second circuit having a second input and a second output, an isolation barrier layer between the first circuit and the second circuit, wherein the second output of the second circuit is coupled to the first input of the first circuit through the isolation barrier. The signal isolator includes a comparator configured to compare the first input of the first circuit to the second output of the second circuit. The second output can be configured to convey at least three states, including a first state indicative of a logical high of an input signal received at the first input, a second state indicative of a logical low of the input signal, and a third state indicative of a fault condition.

    Dual circuit digital isolator
    3.
    发明授权
    Dual circuit digital isolator 有权

    公开(公告)号：US12068237B2

    公开(公告)日：2024-08-20

    申请号：US18051151

    申请日：2022-10-31

    Applicant: Allegro MicroSystems, LLC

    Inventor： Sundar Chetlur ,  Maxim Klebanov ,  Cory Voisine ,  Kenneth Snowdon ,  Hsuan-Jung Wu

    IPC: H01L23/52 ,  H01L21/8234 ,  H01L23/522

    CPC classification number: H01L23/5222 ,  H01L21/823493

    Abstract: An apparatus including; a substrate; an isolator that is formed over the substrate, the isolator including a silicon shield layer that is formed between a first buried oxide (BOX) layer and a second BOX layer; a silicon layer having an oxide trench structure formed therein, the oxide trench structure being arranged to define a first silicon island and a second silicon island; a first electronic circuit that is formed over the first silicon island; and a second electronic circuit that is formed over the second silicon island, the first electronic circuit being electrically coupled to the first electronic circuit.

    SIGNAL ISOLATOR WITH THREE STATE DATA TRANSMISSION
    7.
    发明申请
    SIGNAL ISOLATOR WITH THREE STATE DATA TRANSMISSION 有权

    公开(公告)号：US20210083907A1

    公开(公告)日：2021-03-18

    申请号：US16809825

    申请日：2020-03-05

    Applicant: Allegro MicroSystems, LLC

    Inventor： Robert A. Briano ,  Pedram Sotoodeh Shahnani ,  Cory Voisine

    IPC: H04L25/02 ,  H03K19/00 ,  H04B17/17

    Abstract: A signal isolator integrated circuit package includes a first circuit having a first input and a first output, a second circuit having a second input and a second output, an isolation barrier layer between the first circuit and the second circuit, wherein the second output of the second circuit is coupled to the first input of the first circuit through the isolation barrier. The signal isolator includes a comparator configured to compare the first input of the first circuit to the second output of the second circuit. The second output can be configured to convey at least three states, including a first state indicative of a logical high of an input signal received at the first input, a second state indicative of a logical low of the input signal, and a third state indicative of a fault condition.

    CURRENT FAULT DETECTION SYSTEMS AND METHODS FOR A CURRENT SENSOR
    9.
    发明申请
    CURRENT FAULT DETECTION SYSTEMS AND METHODS FOR A CURRENT SENSOR 审中-公开

    公开(公告)号：US20190293694A1

    公开(公告)日：2019-09-26

    申请号：US15928689

    申请日：2018-03-22

    Applicant: Allegro MicroSystems, LLC

    Inventor： Craig S. Petrie ,  Soo-Chang Choe ,  Cory Voisine

    IPC: G01R19/165 ,  G01R15/20 ,  G01R19/25 ,  G01R19/252

    Abstract: Systems and methods described herein provide a current sensor having fault detection circuitry configured to detect over-current and/or current faults corresponding to current through a conductor being greater than a predetermined level. The current sensor can include a shared signal path, a main signal path, and a fault detection signal path to perform both fault detection and current detection signal processing. The current sensor can include one or more magnetic field sensing elements configured to generate a magnetic field signal indicative of the current through the conductor, an analog-to-digital converter (ADC) configured to receive the magnetic field signal and convert the magnetic field signal into a digital signal, and a fault detector responsive to the digital signal to generate a fault signal indicative of the current through the conductor being greater than a predetermined level.

Patent Agency Ranking