公开(公告)号：US20160028001A1

公开(公告)日：2016-01-28

申请号：US14877309

申请日：2015-10-07

Applicant: Allegro Microsystems, LLC

Inventor： Shixi Louis Liu ,  Harianto Wong ,  Paul A. David ,  John B. Sauber ,  Shaun D. Milano ,  Raguvir Kanda ,  Bruce Hemenway

IPC: H01L43/14 ,  H01L43/06 ,  H01L43/04

CPC classification number: H01L43/14 ,  G01R15/202 ,  G01R15/207 ,  G01R33/0052 ,  G01R33/09 ,  H01L21/4828 ,  H01L23/49548 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L43/04 ,  H01L43/065 ,  H01L2224/131 ,  H01L2224/16245 ,  H01L2224/81801 ,  H01L2924/15162 ,  H01L2924/014 ,  H01L2924/00014

Abstract: In one aspect, a method includes processing a metal substrate, performing a first etch on a first surface of the metal substrate to form, for an integrated circuit package, secondary leads and a curved component having two primary leads and performing a second etch, on a second surface of the substrate opposite the first surface, at locations on the secondary leads and locations on the curved component to provide a locking mechanism. Each primary lead located at a respective end of the curved component.

Abstract translation: 在一个方面，一种方法包括处理金属衬底，在金属衬底的第一表面上执行第一蚀刻，以形成用于集成电路封装的次级引线和具有两个初级引线并执行第二次蚀刻的弯曲元件 所述基板的与所述第一表面相对的第二表面，在所述次级引线上的位置和所述弯曲部件上的位置处，以提供锁定机构。 每个主引线位于弯曲部件的相应端部。

公开(公告)号：US09865807B2

公开(公告)日：2018-01-09

申请号：US14877309

申请日：2015-10-07

Applicant: Allegro Microsystems, LLC

Inventor： Shixi Louis Liu ,  Harianto Wong ,  Paul A. David ,  John B. Sauber ,  Shaun D. Milano ,  Raguvir Kanda ,  Bruce Hemenway

IPC: H01L23/495 ,  H01L43/14 ,  H01L43/04 ,  H01L21/48 ,  H01L43/06 ,  G01R33/00 ,  G01R33/09 ,  G01R15/20 ,  H01L23/00

CPC classification number: H01L43/14 ,  G01R15/202 ,  G01R15/207 ,  G01R33/0052 ,  G01R33/09 ,  H01L21/4828 ,  H01L23/49548 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L43/04 ,  H01L43/065 ,  H01L2224/131 ,  H01L2224/16245 ,  H01L2224/81801 ,  H01L2924/15162 ,  H01L2924/014 ,  H01L2924/00014

Abstract: In one aspect, a method includes processing a metal substrate, performing a first etch on a first surface of the metal substrate to form, for an integrated circuit package, secondary leads and a curved component having two primary leads and performing a second etch, on a second surface of the substrate opposite the first surface, at locations on the secondary leads and locations on the curved component to provide a locking mechanism. Each primary lead located at a respective end of the curved component.