公开(公告)号：US20240032441A1

公开(公告)日：2024-01-25

申请号：US17892162

申请日：2022-08-22

Applicant: United Microelectronics Corp.

Inventor： Chih-Wei Kuo ,  Hung-Chan Lin ,  Chung Yi Chiu

IPC: H01L43/04 ,  H01L27/22 ,  H01L43/06 ,  H01L43/10 ,  H01L43/14

CPC classification number: H01L43/04 ,  H01L27/222 ,  H01L43/06 ,  H01L43/10 ,  H01L43/14

Abstract: Provided is a magnetoresistive random access memory (MRAM) device including a bottom electrode, a magnetic tunnel junction (MTJ) structure, a first spin orbit torque (SOT) layer, a cap layer, a second SOT layer, an etch stop layer, and an upper metal line layer. The MTJ structure is disposed on the bottom electrode. The first SOT layer is disposed on the MTJ structure. The cap layer is disposed on the first SOT layer. The second SOT layer is disposed on the cap layer. The etch stop layer is disposed on the second SOT layer. The upper metal line layer penetrates though the etch stop layer and is landed on the second SOT layer.

公开(公告)号：US20230337551A1

公开(公告)日：2023-10-19

申请号：US17743459

申请日：2022-05-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jia-Rong Wu ,  Chi-Hsuan Cheng ,  Rai-Min Huang ,  Po-Kai Hsu

IPC: H01L43/14 ,  H01L27/22 ,  H01L43/04 ,  H01L43/06

CPC classification number: H01L43/14 ,  H01L27/222 ,  H01L43/04 ,  H01L43/06

Abstract: A method for fabricating semiconductor device includes the steps of first forming a magnetic tunneling junction (MTJ) on a substrate, forming a first spin orbit torque (SOT) layer on the MTJ, forming an inter-metal dielectric (IMD) layer around the first SOT layer, forming a second SOT layer on the IMD layer, forming a first hard mask on the second SOT layer, patterning the first hard mask along a first direction, and then patterning the first hard mask along a second direction.

公开(公告)号：US20230320230A1

公开(公告)日：2023-10-05

申请号：US17709074

申请日：2022-03-30

Applicant: Intel Corporation

Inventor： Punyashloka Debashis ,  Hai Li ,  Chia-Ching Lin ,  Dmitri Evgenievich Nikonov ,  Ian Alexander Young

IPC: H01L43/10 ,  H01L43/04 ,  H01L43/06 ,  H01L43/14 ,  H01L27/22

CPC classification number: H01L43/10 ,  H01L43/04 ,  H01L43/065 ,  H01L43/14 ,  H01L27/228 ,  H03K19/18

Abstract: In one embodiment, an integrated circuit die includes: a first layer comprising a magnetoelectric material; a second layer comprising a monolayer transition metal dichalcogenide (TMD); a magnet between the first layer and the second layer, wherein the magnet has perpendicular magnetic anisotropy; a first conductive trace coupled to the first layer; and a second conductive trace coupled to the magnet.

公开(公告)号：US20230189659A1

公开(公告)日：2023-06-15

申请号：US17550663

申请日：2021-12-14

Applicant: Intel Corporation

Inventor： Punyashloka Debashis ,  Tanay A. Gosavi ,  Hai Li ,  Chia-Ching Lin ,  Dmitri Evgenievich Nikonov ,  Kaan Oguz ,  Ashish Verma Penumatcha ,  Marko Radosavljevic ,  Ian Alexander Young

IPC: H01L43/02 ,  H01L43/04 ,  H01L43/10 ,  H01L43/12 ,  H01L43/14

CPC classification number: H01L43/02 ,  H01L43/04 ,  H01L43/10 ,  H01L43/12 ,  H01L43/14 ,  G06F7/58

Abstract: A probabilistic bit (p-bit) comprises a magnetic tunnel junction (MTJ) comprising a free layer whose magnetization orientation randomly fluctuates in the presence of thermal noise. The p-bit MTJ comprises a reference layer, a free layer, and an insulating layer between the reference and free layers. The reference layer and the free layer comprise synthetic antiferromagnets. The use of a synthetic antiferromagnet for the reference layer reduces the amount of stray magnetic field that can impact the magnetization of the free layer and the use of a synthetic antiferromagnet for the free layer reduces stray magnetic field bias on p-bit random number generation. Tuning the thickness of the nonmagnetic layer of synthetic antiferromagnet free layer can result in faster random number generation time relative to a comparable MTJ with a free layer comprising a single-layer ferromagnet.

公开(公告)号：US20190189909A1

公开(公告)日：2019-06-20

申请号：US16271112

申请日：2019-02-08

Applicant: TDK CORPORATION

Inventor： Tomoyuki SASAKI ,  Yohei SHIOKAWA ,  Atsushi TSUMITA

IPC: H01L43/04 ,  H01L43/14 ,  H01L43/10 ,  H01L43/08 ,  G11C11/16 ,  G11C11/18

CPC classification number: H01L43/04 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/18 ,  H01L27/228 ,  H01L43/08 ,  H01L43/10 ,  H01L43/14

Abstract: A magnetic memory including a plurality of magnetoresistance effect elements that hold information, each including a first ferromagnetic metal layer with a fixed magnetization direction, a second ferromagnetic metal layer with a varying magnetization direction, and a non-magnetic layer sandwiched between the first and second ferromagnetic metal layers; a plurality of first control elements that control reading of the information, wherein each of the plurality of first ferromagnetic metal layers is connected to a first control element; a plurality of spin-orbit torque wiring lines that extend in a second direction intersecting with a first direction which is a stacking direction of the magnetoresistance effect elements, wherein each of the second ferromagnetic metal layers is joined to one spin-orbit torque wiring line; a plurality of second control elements that control electric current flowing through the spin-orbit torque wiring lines.

公开(公告)号：US20190147907A1

公开(公告)日：2019-05-16

申请号：US16243851

申请日：2019-01-09

Applicant: Western Digital Technologies, Inc.

Inventor： Zhanjie LI ,  Suping SONG ,  Michael Kuok San HO

IPC: G11B5/127 ,  H01L27/22 ,  H01L43/08 ,  H01L43/04 ,  G11B5/31 ,  G01R33/12 ,  G11C11/18

CPC classification number: G11B5/1278 ,  G01R33/1284 ,  G11B5/3116 ,  G11B5/3133 ,  G11B5/314 ,  G11B5/315 ,  G11B2005/0008 ,  G11B2005/0024 ,  G11C11/18 ,  H01L27/222 ,  H01L43/04 ,  H01L43/08

Abstract: The present disclosure generally relates to data storage devices, and more specifically, to a magnetic media drive employing a magnetic recording head. The head includes a main pole, a trailing shield, and an oscillator located between the main pole and the trailing shield. The oscillator is disposed at a media facing surface (MFS). The oscillator includes a spin-torque layer sandwiched between two distinct spin Hall layers. The two distinct spin Hall layers generate spin-orbit torque (SOT) that induces in-plane precessions on opposite surfaces of the spin-torque layer, and both in-plane precessions are in the same direction. The same-direction in-plane precessions on opposite surfaces of the spin-torque layer reduce the critical current of the oscillation of the oscillator, leading to high quality recording.

公开(公告)号：US20190079146A1

公开(公告)日：2019-03-14

申请号：US15897708

申请日：2018-02-15

Applicant: Allegro MicroSystems, LLC

Inventor： Hernán D. Romero ,  Octavio H. Alpago

IPC: G01R33/07 ,  H03F3/45 ,  H01L43/04 ,  H03F1/26

CPC classification number: G01R33/075 ,  H01L43/04 ,  H03F1/26 ,  H03F3/387 ,  H03F3/45475 ,  H03F3/45977 ,  H03F2200/331 ,  H03F2200/408 ,  H03F2203/45528 ,  H03M1/00

Abstract: A sensor circuit may include one or more feedback loops to process and attenuate ripple and/or a test signal. The sensor circuit may comprise at least one magnetic field sensing element to generate a magnetic field signal representing a magnetic field to be measured, a test signal generator circuit configured to generate a test signal and combine the test signal with the magnetic field signal to generate a combined signal, and a signal path for processing the combined signal. The signal path may comprise an amplifier circuit to amplify the combined signal, an analog-to-digital converter (ADC) to convert the combined signal to a digital combined signal, and a feedback circuitry coupled to receive the digital combined signal and extract the test signal. A test comparator circuit compares the extracted test signal to a reference signal.

公开(公告)号：US20190036011A1

公开(公告)日：2019-01-31

申请号：US15661826

申请日：2017-07-27

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Bin LIU ,  Eng Huat TOH ,  Ruchil Kumar JAIN

IPC: H01L43/04 ,  H01L43/06 ,  H01L43/14 ,  G01R33/07 ,  G01R33/02 ,  G01R33/00

CPC classification number: H01L43/04 ,  G01R33/0052 ,  G01R33/0206 ,  G01R33/077 ,  H01L27/22 ,  H01L43/065 ,  H01L43/14

Abstract: A method of forming a 3D Hall effect sensor and the resulting device are provided. Embodiments include forming a p-type well in a substrate; forming a first n-type well in a first region surrounded by the p-type well in top view; forming a second n-type well in a second region surrounding the p-type well; providing n-type dopant in the first and second n-type wells; and providing p-type dopant in the p-type well and the first n-type well.

公开(公告)号：US20190006581A1

公开(公告)日：2019-01-03

申请号：US16019831

申请日：2018-06-27

Applicant: Wisconsin Alumni Research Foundation

Inventor： Chang-Beom Eom ,  Tianxiang Nan ,  Trevor Jeffrey Anderson

IPC: H01L43/04 ,  H01L43/10 ,  H01L43/14 ,  G11C11/16 ,  G11C11/18

CPC classification number: H01L43/04 ,  G11C11/161 ,  G11C11/165 ,  G11C11/18 ,  H01L43/08 ,  H01L43/10 ,  H01L43/14

Abstract: Magnetic switching devices, including magnetic memory devices, are provided. The devices use high-quality crystalline films of 4d or 5d transition metal perovskite having a strong spin-orbit coupling (SOC) to produce spin-orbit torque in adjacent ferromagnetic materials via a strong spin-Hall effect.

公开(公告)号：US10079057B2

公开(公告)日：2018-09-18

申请号：US15782854

申请日：2017-10-13

Applicant: Gokce Ozbay ,  Ozhan Ozatay

Inventor： Gokce Ozbay ,  Ozhan Ozatay

IPC: G11C11/30 ,  G11C11/56 ,  G11C11/16 ,  H01L43/04 ,  H01L43/10 ,  H01L43/14 ,  B82Y25/00 ,  B82Y10/00

CPC classification number: G11C11/5607 ,  B82Y10/00 ,  B82Y25/00 ,  G11C11/161 ,  G11C11/1655 ,  G11C11/1673 ,  G11C11/1675 ,  H01L27/222 ,  H01L43/04 ,  H01L43/08 ,  H01L43/10 ,  H01L43/14

Abstract: The invention relates to a three dimensional magnetic memory device (1) employing pure spin currents to write information into magnetic bits. The magnetic memory device (1) is formed of one or more stack of two storage layers (13) placed between two reference layers (9). The stacks are connected to each other through common reference electrodes (12) formed by connecting reference electrodes (11) placed on bottom of a first stack and on top of the second stack positioned under the first stack.