公开(公告)号：US20170154951A1

公开(公告)日：2017-06-01

申请号：US14955882

申请日：2015-12-01

Applicant: Altera Corporation

Inventor： Yan Cui ,  Queennie Suan Imm Lim ,  Shuxian Chen

IPC: H01L49/02 ,  H01L23/552 ,  H01L21/66 ,  H01L27/08

CPC classification number: H01L28/88 ,  H01L23/552

Abstract: In one embodiment, a capacitor structure includes a substrate, a dielectric stack, a first conductor segment, a second conductor segment and a shielding conductor segment. The dielectric stack is formed on the substrate. A first layer of the dielectric stack includes a plurality of conductor segments routed only in a first direction. A first conductor segment among the multiple conductor segments may be biased to a first voltage. The second conductor segment among the multiple conductor segments may be biased to a second voltage. The shielding conductor segment may be biased to the second voltage and is formed at an end of the first conductor segment. In addition to that, the capacitances for the capacitor structure may be adjusted while the footprint of the capacitor structure is fixed.

公开(公告)号：US09171897B1

公开(公告)日：2015-10-27

申请号：US13936245

申请日：2013-07-08

Applicant: Altera Corporation

Inventor： Queennie Suan Imm Lim ,  Dale Ibbotson

IPC: H01L21/20 ,  H01L21/02 ,  H01L49/02

CPC classification number: H01L28/40 ,  H01L28/60

Abstract: Two series-connected metal-insulator-metal (MIM) capacitors are disclosed that are suitable for fabrication in the back-end structure of an integrated circuit. The MIM capacitors have first and second electrically conducting plates on a first insulating layer, third and fourth electrically conducting plates overlapping the first and second conducting plates, a second insulating layer between the first and third conducting plates and between the second and fourth conducting plates, a blind via coupling the first and fourth conducting plates, and connections to the second and third conducting plates. Methods of fabricating such series-connected MIM capacitors are also disclosed.

Abstract translation: 公开了两种串联连接的金属 - 绝缘体金属（MIM）电容器，其适用于在集成电路的后端结构中制造。 MIM电容器具有在第一绝缘层上的第一和第二导电板，与第一和第二导电板重叠的第三和第四导电板，在第一和第三导电板之间以及第二和第四导电板之间的第二绝缘层， 通过联接第一和第四导电板的盲孔以及与第二和第三导电板的连接。 还公开了制造这种串联连接的MIM电容器的方法。

公开(公告)号：US09887257B2

公开(公告)日：2018-02-06

申请号：US14955882

申请日：2015-12-01

Applicant: Altera Corporation

Inventor： Yan Cui ,  Queennie Suan Imm Lim ,  Shuxian Chen

IPC: H01L49/02 ,  H01L23/552

CPC classification number: H01L28/88 ,  H01L23/552

Abstract: In one embodiment, a capacitor structure includes a substrate, a dielectric stack, a first conductor segment, a second conductor segment and a shielding conductor segment. The dielectric stack is formed on the substrate. A first layer of the dielectric stack includes a plurality of conductor segments routed only in a first direction. A first conductor segment among the multiple conductor segments may be biased to a first voltage. The second conductor segment among the multiple conductor segments may be biased to a second voltage. The shielding conductor segment may be biased to the second voltage and is formed at an end of the first conductor segment. In addition to that, the capacitances for the capacitor structure may be adjusted while the footprint of the capacitor structure is fixed.

公开(公告)号：US09768093B1

公开(公告)日：2017-09-19

申请号：US15061483

申请日：2016-03-04

Applicant: Altera Corporation

Inventor： Queennie Suan Imm Lim ,  Shahla Honarkhah

IPC: H01L23/36 ,  H01L23/367 ,  H01L27/08 ,  H01L23/522 ,  H01L21/768 ,  H01L49/02

CPC classification number: H01L23/367 ,  H01L21/76895 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/522 ,  H01L23/5226 ,  H01L23/5228 ,  H01L27/0211 ,  H01L27/0802 ,  H01L28/20

Abstract: An integrated circuit is provided. The integrated circuit includes a continuous resistor body having first and second distal terminals, and a group of electrically-floating dummy conductors that are formed above the continuous resistor body, and between the first and second distal terminals of the continuous resistor body. Each of the group of dummy conductors is coupled to the continuous resistor body through a respective via structure. The group of dummy conductors serves to dissipate heat for the continuous resistor body. If desired, an active conductor is interposed in the dummy conductors and serves as a center-tap for the continuous resistor body. The active conductor is connected to a contact node on the substrate.

公开(公告)号：US09418932B1

公开(公告)日：2016-08-16

申请号：US14663114

申请日：2015-03-19

Applicant: Altera Corporation

Inventor： Queennie Suan Imm Lim ,  Jeffrey T. Watt ,  ShuXian Chen

IPC: H01L27/01 ,  H01L23/522 ,  H01L27/06 ,  H01L49/02 ,  H01C10/08 ,  H01C10/23 ,  H01C1/14

CPC classification number: H01L23/5228 ,  H01C1/14 ,  H01C10/08 ,  H01C10/23 ,  H01L27/0629 ,  H01L28/20

Abstract: An integrated circuit system, and a method of manufacture thereof, includes: an integrated circuit substrate; and a discretized tunable precision resistor having a total resistance including: a resistor body over the integrated circuit substrate, interconnects directly on the resistor body, metal taps directly on the interconnects and at opposing sides of the resistor body, and conductive metal strips over the interconnects, wherein the total resistance is a function of an active resistor length of the resistor body between a pair of the metal taps in contact with two of the conductive metal strips.

Abstract translation: 集成电路系统及其制造方法包括：集成电路基板; 以及具有总电阻的离散可调谐精密电阻器，包括：集成电路基板上的电阻体，直接在电阻体上互连，直接在互连件上的金属抽头和电阻体的相对侧，以及互连上的导电金属带 ，其中总电阻是与两个导电金属带接触的一对金属抽头之间的电阻体的有效电阻器长度的函数。