Self-adaptive analog-to-digital converter

    公开(公告)号:US09923569B1

    公开(公告)日:2018-03-20

    申请号:US15700957

    申请日:2017-09-11

    CPC classification number: H03M1/10 H03M1/00 H03M1/002 H03M1/185 H03M1/462

    Abstract: A self-adaptive SAR ADC techniques that can increase speed and/or decrease its power consumption. In some example approaches, one or more bits from a conversion of a previous sample of an analog input signal can be preloaded onto a DAC circuit of the ADC. If the preloaded bits are determined to be acceptable, bit trials on the current sample can be performed to determine the remaining bits. If not acceptable, the ADC can discard the preloaded bits and perform bit trials on all of the bits. The self-adaptive SAR ADC can include a control loop to adjust, e.g., increase or decrease, the number of bits that are preloaded in a subsequent bit trial using historical data.

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