High density self-routing metal-oxide-metal capacitor

    公开(公告)号:US10692967B1

    公开(公告)日:2020-06-23

    申请号:US16209768

    申请日:2018-12-04

    IPC分类号: H01L49/02 H01L27/02

    摘要: A self-routing capacitor for an integrated circuit having: a first electrode comprising a first base region and a first finger, the first finger extending from a wall of the first base region in a first direction; a second electrode comprising a second base region and a second finger; the second finger extending from a wall of the second base region in a second direction substantially parallel to and opposing the first direction, the second finger coupled to the first finger; a third electrode comprising a third base region and a third finger, the third finger extending from a first wall of the third base in the second direction; and a fourth electrode comprising a fourth finger, the fourth finger extending from a second wall of the third base region in the first direction. The capacitor being coupled to other metal layers through a base region of an electrode.

    Gain calibration
    3.
    发明授权
    Gain calibration 有权
    增益校准

    公开(公告)号:US09413319B2

    公开(公告)日:2016-08-09

    申请号:US14222877

    申请日:2014-03-24

    IPC分类号: H03G3/30 H03M1/10 H03M1/12

    摘要: Apparatus and methods calibrate one or more gain ranges for errors. A system can identify offset error and amplification error that occurs when the system transitions from amplifying an input signal by a first gain factor to amplifying the input signal by a second gain factor. To identify the amplification error, the system can compare the slope of the data signal in a source or reference gain range with the slope of the data signal in the destination gain range. To identify the offset error, the system can compare the amplitude of the data signal in a destination gain range with an expected value in the destination gain range.

    摘要翻译: 设备和方法校准一个或多个增益范围的错误。 系统可以识别当系统从第一增益因子放大输入信号转换到第二增益因子来放大输入信号时发生的偏移误差和放大误差。 为了识别放大误差,系统可以将源或参考增益范围内的数据信号的斜率与目标增益范围内数据信号的斜率进行比较。 为了识别偏移误差,系统可以将目的地增益范围内的数据信号的幅度与目标增益范围内的期望值进行比较。

    HIGH DENSITY SELF-ROUTING METAL-OXIDE-METAL CAPACITOR

    公开(公告)号:US20200176555A1

    公开(公告)日:2020-06-04

    申请号:US16209768

    申请日:2018-12-04

    IPC分类号: H01L49/02 H01L27/02

    摘要: A self-routing capacitor for an integrated circuit having: a first electrode comprising a first base region and a first finger, the first finger extending from a wall of the first base region in a first direction; a second electrode comprising a second base region and a second finger, the second finger extending from a wall of the second base region in a second direction substantially parallel to and opposing the first direction, the second finger coupled to the first finger; a third electrode comprising a third base region and a third finger, the third finger extending from a first wall of the third base in the second direction; and a fourth electrode comprising a fourth finger, the fourth finger extending from a second wall of the third base region in the first direction. The capacitor being coupled to other metal layers through a base region of an electrode.

    Self-adaptive analog-to-digital converter

    公开(公告)号:US09923569B1

    公开(公告)日:2018-03-20

    申请号:US15700957

    申请日:2017-09-11

    IPC分类号: H03M1/10 H03M1/00

    摘要: A self-adaptive SAR ADC techniques that can increase speed and/or decrease its power consumption. In some example approaches, one or more bits from a conversion of a previous sample of an analog input signal can be preloaded onto a DAC circuit of the ADC. If the preloaded bits are determined to be acceptable, bit trials on the current sample can be performed to determine the remaining bits. If not acceptable, the ADC can discard the preloaded bits and perform bit trials on all of the bits. The self-adaptive SAR ADC can include a control loop to adjust, e.g., increase or decrease, the number of bits that are preloaded in a subsequent bit trial using historical data.

    Split-path data acquisition signal chain
    6.
    发明授权
    Split-path data acquisition signal chain 有权
    分路数据采集信号链

    公开(公告)号:US09083369B2

    公开(公告)日:2015-07-14

    申请号:US13891988

    申请日:2013-05-10

    IPC分类号: H03M1/12

    CPC分类号: H03M1/12 H03M1/121

    摘要: The present disclosure provides for split-path data acquisition chains and associated signal processing methods. An exemplary integrated circuit for providing a split-path data acquisition signal chain includes an input terminal for receiving an analog signal; an output terminal for outputting a digital signal; and at least two frequency circuit paths coupled with the input terminal and the output terminal, wherein the at least two frequency circuit paths are configured to process different frequency components of the analog signal and recombine the processed, different frequency components, thereby providing the digital signal.

    摘要翻译: 本公开提供了分离路径数据采集链和相关联的信号处理方法。 用于提供分路数据采集信号链的示例性集成电路包括用于接收模拟信号的输入端; 输出端子,用于输出数字信号; 以及与所述输入端和所述输出端耦合的至少两个频率电路路径,其中所述至少两个频率电路路径被配置为处理所述模拟信号的不同频率分量并重组所处理的不同频率分量,从而提供所述数字信号 。

    Method of Performing Analog-to-Digital Conversion

    公开(公告)号:US20190081636A1

    公开(公告)日:2019-03-14

    申请号:US16040140

    申请日:2018-07-19

    IPC分类号: H03M1/46

    CPC分类号: H03M1/468 H03M1/002 H03M1/462

    摘要: A method of performing analog-to-digital conversion using a successive approximation (SAR) analog-to-digital converter (ADC). A previous digital output is compared to a range based on the first M bits of the previous digital output. If the previous digital output is within that range, a digital-to-analog converter (DAC) of the SAR ADC is preloaded with the first M bits of the previous digital output, prior to commencing bit trials. If the previous digital output is outside of that range, an offset is applied to the first M bits of the previous digital output and the DAC is preloaded based on the M bits and the offset, prior to performing bit trials. This method reduces the possibility of the next input being outside of a further range defined by the preload.

    Method of performing analog-to-digital conversion

    公开(公告)号:US10404264B2

    公开(公告)日:2019-09-03

    申请号:US16040140

    申请日:2018-07-19

    IPC分类号: H03M1/46 H03M1/00

    摘要: A method of performing analog-to-digital conversion using a successive approximation (SAR) analog-to-digital converter (ADC). A previous digital output is compared to a range based on the first M bits of the previous digital output. If the previous digital output is within that range, a digital-to-analog converter (DAC) of the SAR ADC is preloaded with the first M bits of the previous digital output, prior to commencing bit trials. If the previous digital output is outside of that range, an offset is applied to the first M bits of the previous digital output and the DAC is preloaded based on the M bits and the offset, prior to performing bit trials. This method reduces the possibility of the next input being outside of a further range defined by the preload.

    Techniques for reducing offsets in an analog to digital converter
    9.
    发明授权
    Techniques for reducing offsets in an analog to digital converter 有权
    减少模数转换器偏移的技术

    公开(公告)号:US09553599B1

    公开(公告)日:2017-01-24

    申请号:US15017995

    申请日:2016-02-08

    摘要: In an example, a successive approximation register analog-to-digital converter includes a switched capacitor digital-to-analog converter (DAC) first array to sample an input signal and to convert a sample of the input signal to a digital value represented by a plurality of bits, the first array including a first group of capacitors representing at least some of the plurality of bits, a switched capacitor DAC second array including a second group of capacitors representing at least some of the plurality of bits, wherein at least one bit of the plurality of bits represented by the second group of capacitors is represented by at least two capacitors, and wherein each of the two capacitors is configured to be selectively connected to a selected one of at least two reference potentials such that the at least one bit represented by the second group of capacitors is switchable between at least three states.

    摘要翻译: 在一个示例中,逐次逼近寄存器模数转换器包括开关电容器数模转换器(DAC)第一阵列以对输入信号进行采样并将输入信号的采样转换为由 多个位,所述第一阵列包括表示所述多个位中的至少一些位的第一组电容器;开关电容器DAC第二阵列,包括表示所述多个位中的至少一些位的第二组电容器,其中至少一个位 由第二组电容器表示的多个位表示为至少两个电容器,并且其中两个电容器中的每一个被配置为选择性地连接到至少两个参考电位中的所选择的一个,使得至少一个位 由第二组电容器表示,可在至少三种状态之间切换。

    GAIN CALIBRATION
    10.
    发明申请
    GAIN CALIBRATION 有权
    增益校准

    公开(公告)号:US20150270818A1

    公开(公告)日:2015-09-24

    申请号:US14222877

    申请日:2014-03-24

    IPC分类号: H03G3/30

    摘要: Apparatus and methods calibrate one or more gain ranges for errors. A system can identify offset error and amplification error that occurs when the system transitions from amplifying an input signal by a first gain factor to amplifying the input signal by a second gain factor. To identify the amplification error, the system can compare the slope of the data signal in a source or reference gain range with the slope of the data signal in the destination gain range. To identify the offset error, the system can compare the amplitude of the data signal in a destination gain range with an expected value in the destination gain range.

    摘要翻译: 设备和方法校准一个或多个增益范围的错误。 系统可以识别当系统从第一增益因子放大输入信号转换到第二增益因子来放大输入信号时发生的偏移误差和放大误差。 为了识别放大误差,系统可以将源或参考增益范围内的数据信号的斜率与目标增益范围内数据信号的斜率进行比较。 为了识别偏移误差,系统可以将目的地增益范围内的数据信号的幅度与目标增益范围内的期望值进行比较。