公开(公告)号：US09520356B1

公开(公告)日：2016-12-13

申请号：US14849395

申请日：2015-09-09

Applicant: Analog Devices, Inc.

Inventor： John A. Chiesa ,  Cemin Zhang ,  Byungmoo Min ,  Ekrem Oran ,  John N. Poelker

IPC: H01L23/522 ,  H01L23/552 ,  H01L23/498 ,  H01L23/66 ,  H03L7/24 ,  H01L21/48

CPC classification number: H01L23/5226 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/544 ,  H01L23/552 ,  H01L23/66 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2223/6683 ,  H01L2224/16145 ,  H01P3/00 ,  H03L7/24

Abstract: A die is packaged by flip-chip mounting the die with the active side facing a low loss substrate. A ground plane is coupled to the active side of the die by vias through the low loss substrate. The ground plane is positioned to concentrate high frequency electromagnetic fields in the low loss substrate. A tuning height can be adjusted to tune the center frequency of a circuit in the die.

Abstract translation: 芯片通过倒装芯片封装，芯片的主动侧面向低损耗基板。 接地平面通过通孔穿过低损耗衬底耦合到管芯的有源侧。 地平面被定位成将高频电磁场集中在低损耗衬底中。 可以调整调谐高度以调整芯片中电路的中心频率。