公开(公告)号：US12031939B2

公开(公告)日：2024-07-09

申请号：US17827619

申请日：2022-05-27

Applicant: Analog Devices, Inc.

Inventor： Mohamed Azize ,  Shekhar Bakshi

IPC: G01N27/414 ,  G01N27/30 ,  H01L29/16 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66

CPC classification number: G01N27/4145 ,  G01N27/301 ,  G01N27/414 ,  H01L29/42316 ,  H01L29/66045 ,  H01L29/66075 ,  H01L29/1606 ,  H01L29/4908

Abstract: Provided are methods of manufacturing comprising providing a FET base structure, the FET base structure comprising a substrate, a drain and a source; and providing a channel layer on the FET base structure; and providing a first layer on the FET base structure. The first layer comprises a one-dimensional or two-dimensional material and is arranged on an upper surface of the channel layer so as to form a sensing surface of the FET. The step of providing the channel layer comprises forming the channel layer and subsequently transferring the channel layer onto the FET base structure. Alternatively or additionally, the step of providing the first layer on the FET base structure comprises forming the first layer and subsequently transferring the first layer onto the FET base structure.

公开(公告)号：US20240328994A1

公开(公告)日：2024-10-03

申请号：US18741376

申请日：2024-06-12

Applicant: Analog Devices, Inc.

Inventor： Mohamed AZIZE ,  Shekhar Bakshi

IPC: G01N27/414 ,  G01N27/30 ,  H01L29/16 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66

CPC classification number: G01N27/4145 ,  G01N27/301 ,  G01N27/414 ,  H01L29/42316 ,  H01L29/66045 ,  H01L29/66075 ,  H01L29/1606 ,  H01L29/4908

Abstract: Provided are methods of manufacturing comprising providing a FET base structure, the FET base structure comprising a substrate, a drain and a source; and providing a channel layer on the FET base structure; and providing a first layer on the FET base structure. The first layer comprises a one-dimensional or two-dimensional material and is arranged on an upper surface of the channel layer so as to form a sensing surface of the FET. The step of providing the channel layer comprises forming the channel layer and subsequently transferring the channel layer onto the FET base structure. Alternatively or additionally, the step of providing the first layer on the FET base structure comprises forming the first layer and subsequently transferring the first layer onto the FET base structure.