公开(公告)号：US20070222787A1

公开(公告)日：2007-09-27

申请号：US11746453

申请日：2007-05-09

Applicant: Laurent Lefebvre ,  Andrew Gruber ,  Stephen Morein

Inventor： Laurent Lefebvre ,  Andrew Gruber ,  Stephen Morein

IPC: G06T1/00

CPC classification number: G06T1/20 ,  G06F9/3851 ,  G06T1/60 ,  G06T15/005 ,  G06T15/04 ,  G09G5/001 ,  G09G5/363

Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a command thread from either the plurality of pixel or vertex command threads based on relative priorities of the plurality of pixel command threads and the plurality of vertex command threads. The selected command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.

Abstract translation: 图形处理系统包括存储多个像素命令线程和多个顶点命令线程的至少一个存储器件。 提供耦合到所述至少一个存储器件的仲裁器，其基于所述多个像素命令线程和所述多个顶点命令线程的相对优先级从所述多个像素或顶点命令线程中选择命令线程。 所选择的命令线程被提供给能够处理像素命令线程和顶点命令线程的命令处理引擎。

公开(公告)号：US20070222786A1

公开(公告)日：2007-09-27

申请号：US11746446

申请日：2007-05-09

Applicant: Laurent Lefebvre ,  Andrew Gruber ,  Stephen Morein

Inventor： Laurent Lefebvre ,  Andrew Gruber ,  Stephen Morein

IPC: G06T1/00

CPC classification number: G06T1/20 ,  G06F9/3851 ,  G06T1/60 ,  G06T15/005 ,  G06T15/04 ,  G09G5/001 ,  G09G5/363

Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.

Abstract translation: 图形处理系统包括存储多个像素命令线程和多个顶点命令线程的至少一个存储器件。 提供耦合到所述至少一个存储器件的仲裁器，其从所述多个像素命令线程中选择像素命令线程，以及从所述多个顶点命令线程中选择顶点命令线程。 仲裁器还从先前选择的像素命令线程和顶点命令线程中选择命令线程，该命令线程被提供给能够处理像素命令线程和顶点命令线程的命令处理引擎。

公开(公告)号：US07239322B2

公开(公告)日：2007-07-03

申请号：US10673761

申请日：2003-09-29

Applicant: Laurent Lefebvre ,  Andrew Gruber ,  Stephen Morein

Inventor： Laurent Lefebvre ,  Andrew Gruber ,  Stephen Morein

IPC: G06T1/00 ,  G06F13/18 ,  G06F15/80

CPC classification number: G06T1/20 ,  G06F9/3851 ,  G06T1/60 ,  G06T15/005 ,  G06T15/04 ,  G09G5/001 ,  G09G5/363

Abstract: The present invention includes a multi-thread graphics processing system and method thereof including a reservation station having a plurality of command threads stored therein. The system and method further includes an arbiter operably coupled to the reservation station such that the arbiter retrieves a first command thread of the plurality of command threads stored therein such that the arbiter receives the command thread and thereupon provides the command thread to a command processing engine. The system and method further includes the command processing engine coupled to receive the first command thread from the arbiter such that the command processor may perform at least one processing command from the command thread. Whereupon, a command processing engine provides the first command thread back to the associated reservation station.

Abstract translation: 本发明包括一种多线程图形处理系统及其方法，该系统包括具有存储在其中的多个命令线程的保留站。 该系统和方法还包括可操作地耦合到保留站的仲裁器，使得仲裁器检索存储在其中的多个命令线程的第一命令线程，使得仲裁器接收命令线程，并且随后向命令处理引擎提供命令线程 。 该系统和方法还包括命令处理引擎，其被耦合以从仲裁器接收第一命令线程，使得命令处理器可以从命令线程执行至少一个处理命令。 因此，命令处理引擎将第一命令线程提供给相关联的保留站。

公开(公告)号：US08305382B2

公开(公告)日：2012-11-06

申请号：US13253473

申请日：2011-10-05

Applicant: Laurent Lefebvre ,  Andrew Gruber ,  Stephen Morein

Inventor： Laurent Lefebvre ,  Andrew Gruber ,  Stephen Morein

IPC: G06T1/00 ,  G06F13/18 ,  G06F15/18

CPC classification number: G06T1/20 ,  G06F9/3851 ,  G06T1/60 ,  G06T15/005 ,  G06T15/04 ,  G09G5/001 ,  G09G5/363

Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a command thread from either the plurality of pixel or vertex command threads based on relative priorities of the plurality of pixel command threads and the plurality of vertex command threads. The selected command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.

Abstract translation: 图形处理系统包括存储多个像素命令线程和多个顶点命令线程的至少一个存储器件。 提供耦合到所述至少一个存储器件的仲裁器，其基于所述多个像素命令线程和所述多个顶点命令线程的相对优先级从所述多个像素或顶点命令线程中选择命令线程。 所选择的命令线程被提供给能够处理像素命令线程和顶点命令线程的命令处理引擎。

公开(公告)号：US20050210172A1

公开(公告)日：2005-09-22

申请号：US10791519

申请日：2004-03-02

Applicant: Andrew Gruber ,  Stephen Morein

Inventor： Andrew Gruber ,  Stephen Morein

IPC: G06F3/14 ,  G06F11/00 ,  G06F13/00 ,  G09G5/36

CPC classification number: G06F9/544 ,  G06F3/14 ,  G06F9/542 ,  G09G5/363

Abstract: A method and apparatus for processing real time command information includes a real time event engine that monitors event signals. A real time event detector within the real time event engine detects when the real time event occurs. Thereupon, real time event commands within a real time event command buffer are fetched and consumed by the command processor in response to the occurrence of the real time event. The real time event detector contains a plurality of control registers, which contain an event selector register, a real time command buffer point register, and a real time command buffer length register. A driver may program the registers, whereupon a singe real time event detector may be used in conjunction with a plurality of real time event command buffers.

Abstract translation: 用于处理实时命令信息的方法和装置包括监视事件信号的实时事件引擎。 实时事件引擎中的实时事件检测器检测何时发生实时事件。 因此，响应于实时事件的发生，由命令处理器获取并消耗实时事件命令缓冲器内的实时事件命令。 实时事件检测器包含多个控制寄存器，其包含事件选择器寄存器，实时命令缓冲器点寄存器和实时命令缓冲器长度寄存器。 驱动器可以对寄存器进行编程，因此可以结合多个实时事件命令缓冲器使用单个实时事件检测器。

公开(公告)号：US08072461B2

公开(公告)日：2011-12-06

申请号：US12718613

申请日：2010-03-05

Applicant: Laurent Lefebvre ,  Andrew Gruber ,  Stephen Morein

Inventor： Laurent Lefebvre ,  Andrew Gruber ,  Stephen Morein

IPC: G06T1/00 ,  G06F13/18 ,  G06F15/18

CPC classification number: G06T1/20 ,  G06F9/3851 ,  G06T1/60 ,  G06T15/005 ,  G06T15/04 ,  G09G5/001 ,  G09G5/363

Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a command thread from either the plurality of pixel or vertex command threads based on relative priorities of the plurality of pixel command threads and the plurality of vertex command threads. The selected command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.

Abstract translation: 图形处理系统包括存储多个像素命令线程和多个顶点命令线程的至少一个存储器件。 提供耦合到所述至少一个存储器件的仲裁器，其基于所述多个像素命令线程和所述多个顶点命令线程的相对优先级从所述多个像素或顶点命令线程中选择命令线程。 所选择的命令线程被提供给能够处理像素命令线程和顶点命令线程的命令处理引擎。

公开(公告)号：US20070222785A1

公开(公告)日：2007-09-27

申请号：US11746427

申请日：2007-05-09

Applicant: Laurent Lefebvre ,  Andrew Gruber ,  Stephen Morein

Inventor： Laurent Lefebvre ,  Andrew Gruber ,  Stephen Morein

IPC: G06T1/00

CPC classification number: G06T1/20 ,  G06F9/3851 ,  G06T1/60 ,  G06T15/005 ,  G06T15/04 ,  G09G5/001 ,  G09G5/363

Abstract: A graphics processing system comprises a command processing engine capable of processing pixel command threads and vertex command threads. The command processing engine is coupled to both a renderer and a scan converter. Upon completing processing of a command thread, which may comprise a pixel command thread or a vertex command thread, the command engine provides the command thread to either the renderer or the scan converter.

Abstract translation: 图形处理系统包括能够处理像素命令线程和顶点命令线程的命令处理引擎。 命令处理引擎与渲染器和扫描转换器耦合。 在完成可以包括像素命令线程或顶点命令线程的命令线程的处理之后，命令引擎将命令线程提供给渲染器或扫描转换器。

公开(公告)号：US20050068325A1

公开(公告)日：2005-03-31

申请号：US10673761

申请日：2003-09-29

Applicant: Laurent Lefebvre ,  Andrew Gruber ,  Stephen Morein

Inventor： Laurent Lefebvre ,  Andrew Gruber ,  Stephen Morein

IPC: G06F9/38 ,  G06T1/00 ,  G06T15/00 ,  G06T15/04

CPC classification number: G06T1/20 ,  G06F9/3851 ,  G06T1/60 ,  G06T15/005 ,  G06T15/04 ,  G09G5/001 ,  G09G5/363

Abstract: The present invention includes a multi-thread graphics processing system and method thereof including a reservation station having a plurality of command threads stored therein. The system and method further includes an arbiter operably coupled to the reservation station such that the arbiter retrieves a first command thread of the plurality of command threads stored therein such that the arbiter receives the command thread and thereupon provides the command thread to a command processing engine. The system and method further includes the command processing engine coupled to receive the first command thread from the arbiter such that the command processor may perform at least one processing command from the command thread. Whereupon, a command processing engine provides the first command thread back to the associated reservation station.

Abstract translation: 本发明包括一种多线程图形处理系统及其方法，该系统包括具有存储在其中的多个命令线程的保留站。 该系统和方法还包括可操作地耦合到保留站的仲裁器，使得仲裁器检索存储在其中的多个命令线程的第一命令线程，使得仲裁器接收命令线程，并且随后向命令处理引擎提供命令线程 。 该系统和方法还包括命令处理引擎，其被耦合以从仲裁器接收第一命令线程，使得命令处理器可以从命令线程执行至少一个处理命令。 因此，命令处理引擎将第一命令线程提供给相关联的保留站。

公开(公告)号：US09804995B2

公开(公告)日：2017-10-31

申请号：US13007333

申请日：2011-01-14

Applicant: Alexei V. Bourd ,  Andrew Gruber ,  Aleksandra L. Krstic ,  Robert J. Simpson ,  Colin Sharp ,  Chun Yu

Inventor： Alexei V. Bourd ,  Andrew Gruber ,  Aleksandra L. Krstic ,  Robert J. Simpson ,  Colin Sharp ,  Chun Yu

IPC: G06F15/00 ,  G06F15/76 ,  G06F15/173

CPC classification number: G06F15/17325

Abstract: This disclosure describes techniques for extending the architecture of a general purpose graphics processing unit (GPGPU) with parallel processing units to allow efficient processing of pipeline-based applications. The techniques include configuring local memory buffers connected to parallel processing units operating as stages of a processing pipeline to hold data for transfer between the parallel processing units. The local memory buffers allow on-chip, low-power, direct data transfer between the parallel processing units. The local memory buffers may include hardware-based data flow control mechanisms to enable transfer of data between the parallel processing units. In this way, data may be passed directly from one parallel processing unit to the next parallel processing unit in the processing pipeline via the local memory buffers, in effect transforming the parallel processing units into a series of pipeline stages.

公开(公告)号：US09087409B2

公开(公告)日：2015-07-21

申请号：US13409993

申请日：2012-03-01

Applicant: Andrew Gruber

Inventor： Andrew Gruber

IPC: G06T15/40

CPC classification number: G06T15/40 ,  G06T15/04 ,  G06T2200/28

Abstract: This disclosure describes techniques for reducing memory access bandwidth in a graphics processing system based on destination alpha values. The techniques may include retrieving a destination alpha value from a bin buffer, the destination alpha value being generated in response to processing a first pixel associated with a first primitive. The techniques may further include determining, based on the destination alpha value, whether to perform an action that causes one or more texture values for a second pixel to not be retrieved from a texture buffer. In some examples, the action may include discarding the second pixel from a pixel processing pipeline prior to the second pixel arriving at a texture mapping stage of the pixel processing pipeline. The second pixel may be associated with a second primitive different than the first primitive.

Abstract translation: 本公开描述了用于基于目的地alpha值减少图形处理系统中的存储器访问带宽的技术。 这些技术可以包括从箱体缓冲器检索目的地α值，响应于处理与第一基元相关联的第一像素而产生目的地α值。 所述技术可以进一步包括基于目的地α值来确定是否执行导致不从纹理缓冲器检索第二像素的一个或多个纹理值的动作。 在一些示例中，动作可以包括在第二像素到达像素处理流水线的纹理映射阶段之前从像素处理流水线丢弃第二像素。 第二像素可以与不同于第一图元的第二图元相关联。