公开(公告)号：US08711614B1

公开(公告)日：2014-04-29

申请号：US13052374

申请日：2011-03-21

申请人： Andy L. Lee ,  Irfan Rahim ,  Lu Zhou ,  Madhuri Mailavaram ,  Srinivas Perisetty

发明人： Andy L. Lee ,  Irfan Rahim ,  Lu Zhou ,  Madhuri Mailavaram ,  Srinivas Perisetty

IPC分类号： G11C11/34

CPC分类号： G11C8/10

摘要： Memory elements are provided that exhibit immunity to soft error upset events when subjected to radiation strikes such as high-energy atomic particle strikes. The memory elements may each have four inverter-like transistor pairs that form a bistable element and a pair of address transistors. There may be four nodes in the transistor each of which is associated with a respective one of the four inverter-like transistor pairs. There may be two control transistors each of which is coupled between the transistors in a respective one of the inverter-like transistor pairs. During data writing operations, the two control transistors may be turned off to temporarily decouple the transistors in two of the four inverter-like transistor pairs.

摘要翻译： 提供了存储器元件，当受到诸如高能量原子粒子撞击的辐射攻击时，其表现出对软错误失调事件的抗扰性。 存储器元件可以各自具有形成双稳态元件和一对地址晶体管的四个反相器状晶体管对。 晶体管中可能存在四个节点，每个节点与四个逆变器状晶体管对中的相应一个相关联。 可以存在两个控制晶体管，每个控制晶体管耦合在逆变器状晶体管对的相应一个中的晶体管之间。 在数据写入操作期间，可以关闭两个控制晶体管，以暂时将四个反相器状晶体管对中的两个中的晶体管去耦。

公开(公告)号：US07920410B1

公开(公告)日：2011-04-05

申请号：US12391230

申请日：2009-02-23

申请人： Andy L. Lee ,  Irfan Rahim ,  Lu Zhou ,  Madhuri Mailavaram ,  Srinivas Perisetty

发明人： Andy L. Lee ,  Irfan Rahim ,  Lu Zhou ,  Madhuri Mailavaram ,  Srinivas Perisetty

IPC分类号： G11C11/00 ,  G11C5/06

CPC分类号： G11C8/10

摘要： Memory elements are provided that exhibit immunity to soft error upset events when subjected to radiation strikes such as high-energy atomic particle strikes. The memory elements may each have four inverter-like transistor pairs that form a bistable element and a pair of address transistors. There may be four nodes in the transistor each of which is associated with a respective one of the four inverter-like transistor pairs. There may be two control transistors each of which is coupled between the transistors in a respective one of the inverter-like transistor pairs. During data writing operations, the two control transistors may be turned off to temporarily decouple the transistors in two of the four inverter-like transistor pairs.

摘要翻译： 提供了存储器元件，当受到诸如高能量原子粒子撞击的辐射攻击时，其表现出对软错误失调事件的抗扰性。 存储器元件可以各自具有形成双稳态元件和一对地址晶体管的四个反相器状晶体管对。 晶体管中可能存在四个节点，每个节点与四个逆变器状晶体管对中的相应一个相关联。 可以存在两个控制晶体管，每个控制晶体管耦合在逆变器状晶体管对的相应一个中的晶体管之间。 在数据写入操作期间，可以关闭两个控制晶体管，以暂时将四个反相器状晶体管对中的两个中的晶体管去耦。