公开(公告)号：US10554207B1

公开(公告)日：2020-02-04

申请号：US16051058

申请日：2018-07-31

申请人： Anna Y. Herr ,  Quentin P. Herr ,  Ryan Edward Clarke ,  Harold Clifton Hearne, III ,  Alexander Louis Braun ,  Randall M. Burnett ,  Timothy Chi-Chao Lee

发明人： Anna Y. Herr ,  Quentin P. Herr ,  Ryan Edward Clarke ,  Harold Clifton Hearne, III ,  Alexander Louis Braun ,  Randall M. Burnett ,  Timothy Chi-Chao Lee

IPC分类号： H03K19/195 ,  H03K3/38 ,  G11C11/44 ,  G06N10/00

摘要： Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.

公开(公告)号：US11159168B2

公开(公告)日：2021-10-26

申请号：US17094452

申请日：2020-11-10

申请人： Anna Y. Herr ,  Quentin P. Herr ,  Ryan Edward Clarke ,  Harold Clifton Hearne, III ,  Alexander Louis Braun ,  Randall M. Burnett ,  Timothy Chi-Chao Lee

发明人： Anna Y. Herr ,  Quentin P. Herr ,  Ryan Edward Clarke ,  Harold Clifton Hearne, III ,  Alexander Louis Braun ,  Randall M. Burnett ,  Timothy Chi-Chao Lee

IPC分类号： H03K19/195 ,  G06N10/00 ,  G11C11/44 ,  H03K3/38

摘要： Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.