摘要:
Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.
摘要:
Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.
摘要:
An isochronous receiver system is provided and includes a single flux quantum (SFQ) receiver to receive a data signal from a transmission line. The single flux quantum receiver then converts the data signal to an SFQ signal. The system also includes a converter system to convert the SFQ signal to a reciprocal quantum logic (RQL) signal and to phase-align the RQL signal with a sampling phase of an AC clock signal.
摘要:
One embodiment describes a memory cell. The memory cell includes a phase hysteretic magnetic Josephson junction (PHMJJ) that is configured to store one of a first binary logic state corresponding to a binary logic-1 state and a second binary logic state corresponding to a binary logic-0 state in response to a write current that is provided to the memory cell and to generate a superconducting phase based on the stored digital state. The memory cell also includes a superconducting read-select device that is configured to implement a read operation in response to a read current that is provided to the memory cell. The memory cell further includes at least one Josephson junction configured to provide an output based on the superconducting phase of the PHMJJ during the read operation, the output corresponding to the stored digital state.
摘要:
One embodiment describes a JMRAM memory cell system. The system includes a phase hysteretic magnetic Josephson junction (PHMJJ) that stores one of a first binary state and a second binary state in response to a write current provided during a data write operation and to provide a superconducting phase based on the stored digital state. The system also includes a directional write element configured to provide a directional bias current during the data write operation to provide the superconducting phase of the PHMJJ in a predetermined direction corresponding to the first binary state. The system further includes at least one Josephson junction having a critical current that is based on the superconducting phase of the PHMJJ and being configured to provide an output corresponding to the stored digital state in response to a read current that is provided during a read operation.
摘要:
One example includes a superconducting circuit. The circuit includes a plurality of layers comprising a first conductor layer and a second conductor layer overlying the first conductor layer, each of the first and second conductor layers comprising at least one signal element. The circuit also includes a ground grid that is conductively coupled to ground and comprises a first plurality of parallel ground lines that occupy the first conductor layer and extend in a first direction and a second plurality of parallel ground lines that occupy the second conductor layer and extend in a second direction that is orthogonal with respect to the first direction.
摘要:
One embodiment describes an AC/DC converter system. The system includes a flux-shuttle loop that is inductively coupled with an AC input signal. The system also includes a plurality of Josephson junctions spaced about the flux shuttle loop that are configured to sequentially trigger in response to the AC input signal and to provide a single-flux quantum (SFQ) pulse that moves sequentially around the flux-shuttle loop that results in a DC output signal being provided through an output inductor.
摘要:
A reciprocal quantum logic (RQL) latch system is provided. The latch system comprises an output portion that retains a state of the latch system, and a bi-stable loop that comprises a set input, a reset input and an output coupled to the output portion. A positive single flux quantum (SFQ) pulse on the set input when the latch system is in a reset state results in providing a SFQ current in the output portion representative of the latch system being in a set state.
摘要:
One aspect of the present invention includes a Josephson magnetic random access memory (JMRAM) system. The system includes an array of memory cells arranged in rows and columns. Each of the memory cells includes an HMJJD that is configured to store a digital state corresponding to one of a binary logic-1 state and a binary logic-0 state in response to a word-write current that is provided on a word-write line and a bit-write current that is provided on a bit-write line. The HMJJD is also configured to output the respective digital state in response to a word-read current that is provided on a word-read line and a bit-read current that is provided on a bit-read line.
摘要:
In one embodiment, the disclosure relates to a single flux quantum (SFQ) signal transmission line powered by an AC power source. The AC power source supplies power to a transformer having a primary winding and a secondary winding. The primary winding receives the AC signal and the secondary winding communicates the signal to the SFQ transmission line. The transmission line can optionally include an input filter circuit for receiving the incoming SFQ pulse. The filter circuit can have a resistor and an inductor connected in parallel. In an alternative arrangement, the filter circuit can comprise of an inductor. A first Josephson junction can be connected to the filter circuit and to the secondary winding. The Josephson junction triggers in response to the incoming SFQ pulse and regenerates a pulse signal in response to a power discharge from the secondary winding.