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    Superconductor ground plane patterning geometries that attract magnetic flux
    4.
    发明授权
    Superconductor ground plane patterning geometries that attract magnetic flux 有权

    公开(公告)号：US11417821B2

    公开(公告)日：2022-08-16

    申请号：US16296007

    申请日：2019-03-07

    申请人： Anna Y. Herr ,  Vladimir V. Talanov ,  Quentin P. Herr

    发明人： Anna Y. Herr ,  Vladimir V. Talanov ,  Quentin P. Herr

    IPC分类号： H01L39/14 ,  H01L39/08 ,  H01L39/24 ,  H01L27/18

    摘要： Superconducting integrated circuit layouts are proofed against the detrimental effects of stray flux by designing and fabricating them to have one or more ground planes patterned in the x-y plane with a regular grid of low-aspect-ratio flux-trapping voids. The ground plane(s) can be globally patterned with such voids and thousands or more superconducting circuit devices and wires can thereafter be laid out so as not to intersect or come so close to the voids that the trapped flux would induce supercurrents in them, thus preventing undesirable coupling of flux into circuit elements. Sandwiching a wire layer between patterned ground planes permits wires to be laid out even closer to the voids. Voids of successively smaller maximum dimension can be concentrically stacked in pyramidal fashion in multiple ground plane layers having different superconductor transition temperatures, increasing the x-y area available for device placement and wire-up.

    Superconductive gate system
    5.
    发明授权
    Superconductive gate system 有权
    超导门系统

    公开(公告)号：US09455707B2

    公开(公告)日：2016-09-27

    申请号：US14325518

    申请日：2014-07-08

    申请人： Anna Y. Herr ,  Quentin P. Herr

    发明人： Anna Y. Herr ,  Quentin P. Herr

    IPC分类号： H03K19/00 ,  H03K19/195 ,  G11C11/44 ,  H03K3/38 ,  B82Y10/00

    CPC分类号： H03K19/0008 ,  B82Y10/00 ,  G06N99/002 ,  G11C11/44 ,  H03K3/38 ,  H03K19/1952

    摘要： One embodiment includes a superconductive gate system. The superconductive gate system includes a Josephson D-gate circuit comprising a bi-stable loop configured to store a digital state as one of a first data state and a second data state in response to an enable single flux quantum (SFQ) pulse provided on an enable input and a respective presence of or absence of a data SFQ pulse provided on a data input. The digital state can be provided at an output. The readout circuit is coupled to the output and can be configured to reproduce the digital state as an output signal.

    摘要翻译： 一个实施例包括超导门系统。 超导栅极系统包括约瑟夫森D门电路，其包括双稳态环路，其被配置为响应于在第一数据状态和第二数据状态上提供的使能单通量量子（SFQ）脉冲而将数字状态存储为第一数据状态和第二数据状态之一 启用输入和相应的存在或不存在在数据输入上提供的数据SFQ脉冲。 数字状态可以在输出端提供。 读出电路耦合到输出，并且可以被配置为将数字状态再现为输出信号。

    Josephson Magnetic Random Access Memory System and Method
    6.
    发明申请
    Josephson Magnetic Random Access Memory System and Method 有权
    约瑟夫森磁随机存取存储器系统及方法

    公开(公告)号：US20110267878A1

    公开(公告)日：2011-11-03

    申请号：US12771454

    申请日：2010-04-30

    申请人： Anna Y. Herr ,  Quentin P. Herr

    发明人： Anna Y. Herr ,  Quentin P. Herr

    IPC分类号： G11C11/14 ,  G11C7/22

    CPC分类号： G11C11/44

    摘要： One aspect of the present invention includes a Josephson magnetic random access memory (JMRAM) system. The system includes an array of memory cells arranged in rows and columns. Each of the memory cells includes an HMJJD that is configured to store a digital state corresponding to one of a binary logic-1 state and a binary logic-0 state in response to a word-write current that is provided on a word-write line and a bit-write current that is provided on a bit-write line. The HMJJD is also configured to output the respective digital state in response to a word-read current that is provided on a word-read line and a bit-read current that is provided on a bit-read line.

    摘要翻译： 本发明的一个方面包括约瑟夫森磁随机存取存储器（JMRAM）系统。 该系统包括以行和列排列的存储单元阵列。 每个存储器单元包括HMJJD，其被配置为响应于在字写入线上提供的字写入电流来存储对应于二进制逻辑1状态和二进制逻辑0状态之一的数字状态 以及在位写入线路上提供的位写入电流。 HMJJD还被配置为响应于在字读取线上提供的字读电流和提供在位读取线上的位读电流来输出相应的数字状态。

    Phase hysteretic magnetic josephson junction memory cell
    7.
    发明授权
    Phase hysteretic magnetic josephson junction memory cell 有权

    公开(公告)号：US09653153B2

    公开(公告)日：2017-05-16

    申请号：US15013687

    申请日：2016-02-02

    申请人： Anna Y. Herr ,  Quentin P. Herr ,  Andrew Hostetler Miklich

    发明人： Anna Y. Herr ,  Quentin P. Herr ,  Andrew Hostetler Miklich

    IPC分类号： G11C11/44 ,  G11C11/16

    CPC分类号： G11C11/44 ,  G11C11/16

    摘要： One embodiment describes a memory cell. The memory cell includes a phase hysteretic magnetic Josephson junction (PHMJJ) that is configured to store one of a first binary logic state corresponding to a binary logic-1 state and a second binary logic state corresponding to a binary logic-0 state in response to a write current that is provided to the memory cell and to generate a superconducting phase based on the stored digital state. The memory cell also includes a superconducting read-select device that is configured to implement a read operation in response to a read current that is provided to the memory cell. The memory cell further includes at least one Josephson junction configured to provide an output based on the superconducting phase of the PHMJJ during the read operation, the output corresponding to the stored digital state.

    Superconducting phase-controlled hysteretic magnetic Josephson junction JMRAM memory cell
    8.
    发明授权
    Superconducting phase-controlled hysteretic magnetic Josephson junction JMRAM memory cell 有权
    超导相控滞后磁约瑟夫逊结JMRAM记忆单元

    公开(公告)号：US09520181B1

    公开(公告)日：2016-12-13

    申请号：US14854994

    申请日：2015-09-15

    申请人： Donald L. Miller ,  Andrew Hostetler Miklich ,  Anna Y. Herr ,  Quentin P. Herr ,  William Robert Reohr

    发明人： Donald L. Miller ,  Andrew Hostetler Miklich ,  Anna Y. Herr ,  Quentin P. Herr ,  William Robert Reohr

    IPC分类号： G11C11/44 ,  G11C11/16

    CPC分类号： G11C11/44 ,  G11C11/16 ,  G11C11/1673 ,  G11C11/1675

    摘要： One embodiment describes a JMRAM memory cell system. The system includes a phase hysteretic magnetic Josephson junction (PHMJJ) that stores one of a first binary state and a second binary state in response to a write current provided during a data write operation and to provide a superconducting phase based on the stored digital state. The system also includes a directional write element configured to provide a directional bias current during the data write operation to provide the superconducting phase of the PHMJJ in a predetermined direction corresponding to the first binary state. The system further includes at least one Josephson junction having a critical current that is based on the superconducting phase of the PHMJJ and being configured to provide an output corresponding to the stored digital state in response to a read current that is provided during a read operation.

    摘要翻译： 一个实施例描述了JMRAM存储器单元系统。 该系统包括相位滞后磁约瑟夫逊结（PHMJJ），其响应于在数据写入操作期间提供的写入电流而存储第一二进制状态和第二二进制状态之一，并且基于所存储的数字状态提供超导相位。 该系统还包括定向写入元件，其被配置为在数据写入操作期间提供方向偏置电流，以在对应于第一二进制状态的预定方向上提供PHMJJ的超导相位。 该系统还包括至少一个约瑟夫逊结，其具有基于PHMJJ的超导相位的临界电流，并且被配置为响应于在读取操作期间提供的读取电流来提供对应于存储的数字状态的输出。

    Ground grid for superconducting circuits
    9.
    发明授权
    Ground grid for superconducting circuits 有权
    超导电路接地网

    公开(公告)号：US09466643B2

    公开(公告)日：2016-10-11

    申请号：US14482654

    申请日：2014-09-10

    申请人： Quentin P. Herr ,  Anna Y. Herr ,  Steven Brian Shauck ,  Eileen Jiwon Min

    发明人： Quentin P. Herr ,  Anna Y. Herr ,  Steven Brian Shauck ,  Eileen Jiwon Min

    IPC分类号： G11C11/44 ,  H01L27/18 ,  H01L39/02 ,  H01L39/22 ,  H01L39/24 ,  H03K19/195 ,  G11C19/32

    CPC分类号： H01L27/18 ,  G11C11/44 ,  G11C19/32 ,  H01L39/025 ,  H01L39/22 ,  H01L39/223 ,  H01L39/24 ,  H03K19/195

    摘要： One example includes a superconducting circuit. The circuit includes a plurality of layers comprising a first conductor layer and a second conductor layer overlying the first conductor layer, each of the first and second conductor layers comprising at least one signal element. The circuit also includes a ground grid that is conductively coupled to ground and comprises a first plurality of parallel ground lines that occupy the first conductor layer and extend in a first direction and a second plurality of parallel ground lines that occupy the second conductor layer and extend in a second direction that is orthogonal with respect to the first direction.

    摘要翻译： 一个例子包括超导电路。 该电路包括多个层，包括第一导体层和覆盖第一导体层的第二导体层，第一和第二导体层中的每一个包括至少一个信号元件。 电路还包括导电耦合到地面的接地栅极，并且包括占据第一导体层并在第一方向上延伸的第一多个平行接地线和占据第二导体层并延伸的第二多个平行接地线的接地栅极 在相对于第一方向正交的第二方向上。

    JOSEPHSON AC/DC CONVERTER SYSTEMS AND METHOD
    10.
    发明申请
    JOSEPHSON AC/DC CONVERTER SYSTEMS AND METHOD 有权
    JOSEPHSON AC / DC转换器系统和方法

    公开(公告)号：US20150092465A1

    公开(公告)日：2015-04-02

    申请号：US14044220

    申请日：2013-10-02

    申请人： Quentin P. Herr ,  Anna Y. Herr

    发明人： Quentin P. Herr ,  Anna Y. Herr

    IPC分类号： H02M7/04

    CPC分类号： B82Y10/00 ,  G06N99/002 ,  H02M7/04 ,  H02M7/043 ,  H03K17/92 ,  H03K19/0008 ,  H03K19/195 ,  H03K19/1952 ,  H03K19/1954 ,  H03K2217/0036

    摘要： One embodiment describes an AC/DC converter system. The system includes a flux-shuttle loop that is inductively coupled with an AC input signal. The system also includes a plurality of Josephson junctions spaced about the flux shuttle loop that are configured to sequentially trigger in response to the AC input signal and to provide a single-flux quantum (SFQ) pulse that moves sequentially around the flux-shuttle loop that results in a DC output signal being provided through an output inductor.

    摘要翻译： 一个实施例描述了一种AC / DC转换器系统。 该系统包括与AC输入信号感应耦合的磁通穿越回路。 该系统还包括围绕磁通穿梭回路间隔开的多个约瑟夫逊结，其被配置为响应于AC输入信号而顺序地触发并提供在磁通穿梭循环周围依次移动的单通量量子（SFQ）脉冲， 导致通过输出电感器提供直流输出信号。