-
1.发明授权公开(公告)号：US07576591B2
公开(公告)日：2009-08-18
申请号：US11780206
申请日：2007-07-19
申请人： Antonino Conte , Carmelo Ucciardello , Carmine D'Alessandro , Mario Micciche , Giovanni Matranga , Diego De Costantini
发明人： Antonino Conte , Carmelo Ucciardello , Carmine D'Alessandro , Mario Micciche , Giovanni Matranga , Diego De Costantini
IPC分类号： G05F1/10
摘要： A charge pump system is provided that includes at least one first pump for generating a first working voltage, a second pump for generating a second working voltage, and a third pump for generating a third working voltage. The first pump is connected to an internal supply voltage reference that can having a limited value, and has an output terminal connected to the second and third pumps so as to supplying them with the first working voltage as their supply voltage. A method is also provided for managing the generation of voltages to be used with such a charge pump system.
摘要翻译： 提供一种电荷泵系统，其包括用于产生第一工作电压的至少一个第一泵，用于产生第二工作电压的第二泵和用于产生第三工作电压的第三泵。 第一泵连接到可以具有有限值的内部电源参考电压，并且具有连接到第二和第三泵的输出端，以便向它们提供第一工作电压作为它们的电源电压。 还提供了一种用于管理与这种电荷泵系统一起使用的电压的产生的方法。
-
公开(公告)号：US20080101125A1
公开(公告)日：2008-05-01
申请号：US11977876
申请日：2007-10-26
申请人： Antonino Conte , Gianbattista Logiudice , Giovanni Matranga , Mario Micciche' , Carmelo Ucciardello , Diego De Costantini
发明人： Antonino Conte , Gianbattista Logiudice , Giovanni Matranga , Mario Micciche' , Carmelo Ucciardello , Diego De Costantini
IPC分类号： G11C16/04
CPC分类号： G11C16/12
摘要： An EEPROM memory having a matrix of individually selectable memory cells, the matrix having a plurality of columns, a plurality of data lines each coupled with the cells of a corresponding column, the data lines being grouped in a plurality of packets, a plurality of biasing elements for providing a biasing signal to the data lines, and means for selecting the biasing elements for a selected one of the packets, wherein each biasing element is associated with corresponding data lines of a plurality of packets, the biasing element comprising switching means for selectively applying the biasing signal to a selected one of the associated data lines.
摘要翻译： 一种EEPROM存储器，具有单独可选择的存储单元矩阵，该矩阵具有多个列，多个数据线，每条数据线与相应列的单元相耦合，数据线被分组成多个分组，多个偏置 用于向数据线提供偏置信号的元件以及用于为所选分组中的所选择的一个分组选择偏置元件的装置，其中每个偏置元件与多个分组的相应数据线相关联，所述偏置元件包括用于选择性地 将偏置信号应用到所选择的一个相关联的数据线。
-
3.发明授权Dynamic biasing circuit for a protection stage using low voltage transistors 有权用于使用低压晶体管的保护级的动态偏置电路公开(公告)号：US08604868B2
公开(公告)日：2013-12-10
申请号：US13435210
申请日：2012-03-30
IPC分类号： G05F1/10
CPC分类号： H03K17/102 , H03K3/356113
摘要： A biasing circuit may include an input configured to receive a supply voltage, a value of which is higher than a limit voltage. The biasing circuit may also include a control stage configured to generate first and second control signals with mutually complementary values, equal alternatively to a first value, in a first half-period of a clock signal, or to a second value, in a second half-period of the clock signal. The first and second values may be a function of the supply and limit voltages. The biasing circuit may also include a biasing stage configured to generate a biasing voltage as a function of the values of the first and second control signals. The first and second control signals may control transfer transistors for transferring the supply voltage to respective outputs, while the biasing voltage may be for controlling protection transistors to reduce overvoltages on the transfer transistors.
摘要翻译： 偏置电路可以包括被配置为接收其值高于限制电压的电源电压的输入。 偏置电路还可以包括控制级，其被配置为在时钟信号的第一半个周期中产生第二和第二控制信号，该第一和第二控制信号具有相互互补的值，等于第一个值，或在第二个半个时钟信号中的第二个值 时钟信号的周期。 第一和第二值可以是电源和极限电压的函数。 偏置电路还可以包括被配置为产生作为第一和第二控制信号的值的函数的偏置电压的偏置级。 第一和第二控制信号可以控制用于将电源电压传送到各个输出的转移晶体管，而偏置电压可以用于控制保护晶体管以减小转移晶体管的过电压。
-
4.发明授权Electronic circuit for generating low voltage and high frequency phases in a charge pump 有权用于在电荷泵中产生低电压和高频相的电子电路公开(公告)号：US08063693B2
公开(公告)日：2011-11-22
申请号：US12559967
申请日：2009-09-15
CPC分类号： H02M3/073 , H02M2003/077
摘要： A charge pump latch circuit is provided that includes at least one first and at least one second charge pump stage interconnected by an intermediate circuit node, and a stabilization stage connected to the intermediate circuit node and to control terminals of transistors of the first and second charge pump stages. The stabilization stage includes at least one first pair and at least one second pair of first and second enable terminals receiving suitable and distinct phase signals that ensure the turn-off of the stabilization stage during overlapping periods of the phase signals. Also provided is a method for using a stabilization stage to drive transistors in first and second charge pump stages that are interconnected by an intermediate circuit node.
摘要翻译： 提供一种电荷泵锁存电路，其包括由中间电路节点互连的至少一个第一和至少一个第二电荷泵级，以及连接到中间电路节点的稳定级，并且控制第一和第二电荷的晶体管的端子 泵级。 稳定级包括至少一个第一对和至少一个第二对第一和第二使能端，其接收合适且不同的相位信号，以确保在相位信号的重叠周期期间稳定级的关断。 还提供了一种使用稳定级来驱动由中间电路节点互连的第一和第二电荷泵级中的晶体管的方法。
-
公开(公告)号：US07742342B2
公开(公告)日：2010-06-22
申请号：US11977876
申请日：2007-10-26
申请人： Antonino Conte , Gianbattista Logiudice , Giovanni Matranga , Mario Micchche' , Carmelo Ucciardello , De Costantini Diego
发明人： Antonino Conte , Gianbattista Logiudice , Giovanni Matranga , Mario Micchche' , Carmelo Ucciardello , De Costantini Diego
IPC分类号： G11C16/06
CPC分类号： G11C16/12
摘要： An EEPROM memory having a matrix of individually selectable memory cells, the matrix having a plurality of columns, a plurality of data lines each coupled with the cells of a corresponding column, the data lines being grouped in a plurality of packets, a plurality of biasing elements for providing a biasing signal to the data lines, and means for selecting the biasing elements for a selected one of the packets, wherein each biasing element is associated with corresponding data lines of a plurality of packets, the biasing element comprising switching means for selectively applying the biasing signal to a selected one of the associated data lines.
摘要翻译： 一种EEPROM存储器，具有单独可选择的存储单元矩阵，该矩阵具有多个列，多个数据线，每条数据线与相应列的单元耦合，数据线被分组成多个分组，多个偏置 用于向数据线提供偏置信号的元件以及用于为所选分组中的所选择的一个分组选择偏置元件的装置，其中每个偏置元件与多个分组的相应数据线相关联，所述偏置元件包括用于选择性地 将偏置信号应用到所选择的一个相关联的数据线。
-
6.发明申请公开(公告)号：US20120274393A1
公开(公告)日：2012-11-01
申请号：US13435210
申请日：2012-03-30
IPC分类号： G05F3/10
CPC分类号： H03K17/102 , H03K3/356113
摘要： A biasing circuit may include an input configured to receive a supply voltage, a value of which is higher than a limit voltage. The biasing circuit may also include a control stage configured to generate first and second control signals with mutually complementary values, equal alternatively to a first value, in a first half-period of a clock signal, or to a second value, in a second half-period of the clock signal. The first and second values may be a function of the supply and limit voltages. The biasing circuit may also include a biasing stage configured to generate a biasing voltage as a function of the values of the first and second control signals. The first and second control signals may control transfer transistors for transferring the supply voltage to respective outputs, while the biasing voltage may be for controlling protection transistors to reduce overvoltages on the transfer transistors.
摘要翻译： 偏置电路可以包括被配置为接收其值高于限制电压的电源电压的输入。 偏置电路还可以包括控制级，其被配置为在时钟信号的第一半个周期中产生第二和第二控制信号，该第一和第二控制信号具有相互互补的值，等于第一个值，或在第二个半个时钟信号中的第二个值 时钟信号的周期。 第一和第二值可以是电源和极限电压的函数。 偏置电路还可以包括被配置为产生作为第一和第二控制信号的值的函数的偏置电压的偏置级。 第一和第二控制信号可以控制用于将电源电压传送到各个输出的转移晶体管，而偏置电压可以用于控制保护晶体管以减小转移晶体管的过电压。
-
7.发明授权公开(公告)号：US08994355B2
公开(公告)日：2015-03-31
申请号：US13401078
申请日：2012-02-21
CPC分类号： H02M3/073
摘要： A voltage converter device includes a voltage regulator having a supply terminal for receiving a supply voltage and an output terminal for providing a regulated voltage. A voltage multiplier is for receiving the regulated voltage and providing a boosted voltage higher in absolute value than the regulated voltage. The voltage multiplier includes circuitry for providing a clock signal that switches periodically between the regulated voltage and a reference voltage, and a sequence of capacitive stages that alternately accumulate and transfer electric charge according to the clock signal for generating the boosted voltage from the regulated voltage. The voltage regulator includes a power transistor and a regulation transistor each having a first conduction terminal, a second conduction terminal and a control terminal.
摘要翻译： 电压转换器装置包括具有用于接收电源电压的电源端子和用于提供调节电压的输出端子的电压调节器。 电压倍增器用于接收调节电压并提供绝对值高于调节电压的升压电压。 电压倍增器包括用于提供在调节电压和参考电压之间周期性切换的时钟信号的电路，以及根据时钟信号交替地累积和传送电荷的电容级序列，用于从调节电压产生升压电压。 电压调节器包括功率晶体管和调节晶体管，每个具有第一导电端子，第二导电端子和控制端子。
-
公开(公告)号：US20110068857A1
公开(公告)日：2011-03-24
申请号：US12882981
申请日：2010-09-15
IPC分类号： G05F3/02
CPC分类号： H02M3/073 , H02M2003/077
摘要： A charge pump including first and a second charge-pump stages electrically coupled, four pump capacitors connected between two enable terminals and four internal nodes, two pump transistors connected to the pump capacitors and to the internal nodes, and having respective control terminals, two biasing capacitors, connected between the control terminals and the enable terminals, and an equalization circuit connected between the control terminals and structured to limit the voltage between the control terminals within a first range of values.
摘要翻译： 电荷泵包括第一和第二电荷泵级电耦合，四个泵电容器连接在两个使能端子和四个内部节点之间，两个泵浦晶体管连接到泵电容器和内部节点，并具有相应的控制端子，两个偏置 连接在控制端子和使能端子之间的电容器，以及连接在控制端子之间并被构造成将控制端子之间的电压限制在第一值范围内的均衡电路。
-
公开(公告)号：US20120250421A1
公开(公告)日：2012-10-04
申请号：US13421322
申请日：2012-03-15
CPC分类号： H02M3/073 , H02M2003/076 , Y10T29/49117
摘要： The charge pump circuit has a plurality of cascaded charge pump stages, each provided with a first pump capacitor connected to a first internal node and receiving a first high voltage phase signal, and a second pump capacitor connected to a second internal node and receiving a second high voltage phase signal, complementary with respect to the first. A first transfer transistor is coupled between the first internal node and an intermediate node, and a second transfer transistor is coupled between the second internal node and the intermediate node. The first and second high voltage phase signals have a voltage dynamics higher than a maximum voltage sustainable by the first and second transfer transistors. A protection stage is set between the first internal node and second internal node and respectively, the first transfer transistor and second transfer transistor, for protecting the same transfer transistors from overvoltages.
摘要翻译： 电荷泵电路具有多个级联的电荷泵级，每个级联电荷泵级设置有连接到第一内部节点并接收第一高电压相位信号的第一泵电容器和连接到第二内部节点并接收第二内部节点的第二泵电容器 高电压相位信号，相对于第一相互补充。 第一传输晶体管耦合在第一内部节点和中间节点之间，并且第二传输晶体管耦合在第二内部节点和中间节点之间。 第一和第二高电压相位信号具有比由第一和第二传输晶体管可持续的最大电压高的电压动态特性。 在第一内部节点和第二内部节点之间设置保护级，分别设置第一传输晶体管和第二传输晶体管，用于保护相同的传输晶体管免受过电压。
-
公开(公告)号：US08570813B2
公开(公告)日：2013-10-29
申请号：US13421322
申请日：2012-03-15
IPC分类号： G11C11/34
CPC分类号： H02M3/073 , H02M2003/076 , Y10T29/49117
摘要： The charge pump circuit has a plurality of cascaded charge pump stages, each provided with a first pump capacitor connected to a first internal node and receiving a first high voltage phase signal, and a second pump capacitor connected to a second internal node and receiving a second high voltage phase signal, complementary with respect to the first. A first transfer transistor is coupled between the first internal node and an intermediate node, and a second transfer transistor is coupled between the second internal node and the intermediate node. The first and second high voltage phase signals have a voltage dynamics higher than a maximum voltage sustainable by the first and second transfer transistors. A protection stage is set between the first internal node and second internal node and respectively, the first transfer transistor and second transfer transistor, for protecting the same transfer transistors from overvoltages.
摘要翻译： 电荷泵电路具有多个级联的电荷泵级，每个级联电荷泵级设置有连接到第一内部节点并接收第一高电压相位信号的第一泵电容器和连接到第二内部节点的第二泵电容器并且接收第二 高电压相位信号，相对于第一相互补充。 第一传输晶体管耦合在第一内部节点和中间节点之间，并且第二传输晶体管耦合在第二内部节点和中间节点之间。 第一和第二高电压相位信号具有比由第一和第二传输晶体管可持续的最大电压高的电压动态特性。 在第一内部节点和第二内部节点之间设置保护级，分别设置第一传输晶体管和第二传输晶体管，用于保护相同的传输晶体管免受过电压。
-
-
-
-
-
-
-
-
-
搜索结果
61 条记录 (耗时 0.025 秒)
