公开(公告)号：US07863971B1

公开(公告)日：2011-01-04

申请号：US11998009

申请日：2007-11-27

申请人： Anup Nayak ,  Sanjay Kumar Sancheti ,  Shailja Garg

发明人： Anup Nayak ,  Sanjay Kumar Sancheti ,  Shailja Garg

IPC分类号： H03K17/74 ,  G11C5/14

CPC分类号： H03K19/0016 ,  G06F1/3203 ,  G06F1/3287 ,  G11C5/14 ,  H03K17/74 ,  Y02D10/171

摘要： A configurable power controller and method for controlling power of a macro circuit block, such as a memory circuit, in multiple power modes is described to help minimize power consumption of the macro circuit block when the application environment for the macro circuit block is in a lower power mode than during its normal power mode.

摘要翻译： 描述了用于以多种功率模式来控制诸如存储器电路的宏电路块的功率的可配置功率控制器和方法，以在宏电路块的应用环境处于较低的状态时帮助最小化宏电路块的功率消耗 电源模式比正常电源模式。

公开(公告)号：US08074086B1

公开(公告)日：2011-12-06

申请号：US11953176

申请日：2007-12-10

申请人： Sanjay Kumar Sancheti ,  Anup Nayak ,  Bo Gao

发明人： Sanjay Kumar Sancheti ,  Anup Nayak ,  Bo Gao

IPC分类号： G06F1/26

CPC分类号： G06F1/3203 ,  G06F1/26 ,  G06F1/3287 ,  H02H9/001 ,  Y02D10/171 ,  Y02D50/20

摘要： Disclosed are a circuit and a method for controlling dynamic in-rush current in a power management circuit. The circuit includes a current limiting unit having a first quantity of sleep mode devices. A voltage drop minimization unit is coupled to the current limiting unit and has a second quantity of sleep mode devices. The second quantity of sleep mode devices is greater than the first quantity of sleep mode devices. A sequential enabling unit is coupled to both the current limiting unit and the voltage drop minimization unit. The sequential enabling unit is configured to turn on the voltage drop minimization unit after the current limiting unit in accordance with a predetermined delay.

摘要翻译： 公开了一种用于控制电源管理电路中的动态浪涌电流的电路和方法。 该电路包括具有第一数量的睡眠模式装置的限流单元。 电压降最小化单元耦合到限流单元并具有第二数量的睡眠模式设备。 第二数量的睡眠模式设备大于第一数量的睡眠模式设备。 顺序启动单元耦合到电流限制单元和电压降最小化单元。 顺序使能单元被配置为根据预定的延迟在电流限制单元之后接通电压降最小化单元。