公开(公告)号：US20150116380A1

公开(公告)日：2015-04-30

申请号：US14502945

申请日：2014-09-30

Applicant: Apple Inc.

Inventor： Asif HUSSAIN ,  Andrew P. AITKEN ,  Manisha P. PANDYA

IPC: G09G3/34

CPC classification number: H05B33/0815 ,  G09G3/3406 ,  G09G3/342 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/064 ,  Y02B20/346

Abstract: The embodiments discussed herein relate to systems, methods, and apparatus for synchronizing a pulse width modulation (PWM) dimming clock signal with a frame rate signal, line sync signal, and/or a horizontal sync signal of a display device. The PWM dimming clock signal can be generated by a synchronization block having a programmable offset/delay. The programmable offset/delay can control the offset or phase difference between an input and an output clock signal of the synchronization block. Depending on the clock rate of PWM dimming and/or panel resolution, the phase/offset delay can be adjusted to achieve the optimum front of screen performance. Additionally, an input clock generator/missing pulse detection block can output a programmed clock signal to the synchronization block in case of a missing external clock, or insert a pulse when there is a missing pulse detected, thereby providing an un-interrupted input clock signal to the PWM generator.

Abstract translation: 本文讨论的实施例涉及用于使脉宽调制（PWM）调光时钟信号与显示设备的帧速率信号，行同步信号和/或水平同步信号同步的系统，方法和装置。 PWM调光时钟信号可以由具有可编程偏移/延迟的同步块产生。 可编程偏移/延迟可以控制同步块的输入和输出时钟信号之间的偏移或相位差。 根据PWM调光和/或面板分辨率的时钟频率，可以调整相位/偏移延迟，以实现屏幕性能的最佳化。 此外，在缺少外部时钟的情况下，输入时钟发生器/丢失脉冲检测块可以将编程的时钟信号输出到同步块，或者当检测到缺失脉冲时插入脉冲，从而提供未中断的输入时钟信号 到PWM发生器。