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公开(公告)号：US12160249B2
公开(公告)日：2024-12-03
申请号：US18338920
申请日：2023-06-21
Applicant: Apple Inc.
Inventor： Yi Zhao , David M. Signoff
Abstract: A number of unit cells of a digital-to-analog converter (DAC) may be simultaneously activated to generate an analog signal. However, while each unit cell may be generally the same, there may be variations such as non-linearity or noise in the analog output depending on which unit cells are activated for a given digital signal value. For example, as additional unit cells are activated for increased values of the analog signal, the fill order in which the unit cells are activated may affect the linearity/noise of the DAC. The decision units may be programmable to select which branches of the fractal DAC to activate, changing the fill order based on a fill-selection signal. The fill order may be set by a fill controller via the fill-selection signal to account for manufacturing variations, gradients in the supply voltage, output line routing, and/or environmental factors such as temperature.
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公开(公告)号：US20240222877A1
公开(公告)日：2024-07-04
申请号：US18092683
申请日：2023-01-03
Applicant: Apple Inc.
Inventor： Sidharth S. Dalmia , David M. Signoff , Jennifer M. Edwards
CPC classification number: H01Q15/142 , H01Q1/2283
Abstract: A radio frequency package for an electronic device with a reduced size and improved performance is presented herein. The radio frequency package includes a front-end package, transceiver dies and at least one antenna array providing a wireless communication functionality for the radio frequency package. The front-end package includes a radio frequency front-end die and at least one power control die connected to an insulation film substrate via first connectors. Each of the transceiver dies is connected to the at least one antenna array using second connectors.
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公开(公告)号：US10707813B2
公开(公告)日：2020-07-07
申请号：US16212656
申请日：2018-12-06
Applicant: Apple Inc.
Inventor： David M. Signoff , Morteza Nick , Anuranjan Jha
Abstract: A power amplifier and method for operating the same is disclosed. The amplifier includes a number of transistors coupled in series between a power node and a ground node. These transistors include a first transistor having a source terminal coupled to the power node, and a second transistor having its source terminal coupled to a ground node. A subset of transistors is also coupled in series between the first and second transistors. During operation in a first mode, the first and second transistors act as switching transistors, switching according to data received thereby. The subset of transistors, during the first mode, act as cascode transistors. During a second mode of operation, the transistors of the subset act as switching transistors, switching in accordance with the received data.
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公开(公告)号：US20230079487A1
公开(公告)日：2023-03-16
申请号：US17471786
申请日：2021-09-10
Applicant: Apple Inc.
Inventor： Yi Zhao , David M. Signoff
Abstract: A number of unit cells of a digital-to-analog converter (DAC) may be simultaneously activated to generate an analog signal. However, while each unit cell may be generally the same, there may be variations such as non-linearity or noise in the analog output depending on which unit cells are activated for a given digital signal value. For example, as additional unit cells are activated for increased values of the analog signal, the fill order in which the unit cells are activated may affect the linearity/noise of the DAC. The decision units may be programmable to select which branches of the fractal DAC to activate, changing the fill order based on a fill-selection signal. The fill order may be set by a fill controller via the fill-selection signal to account for manufacturing variations, gradients in the supply voltage, output line routing, and/or environmental factors such as temperature.
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公开(公告)号：US20240250705A1
公开(公告)日：2024-07-25
申请号：US18158364
申请日：2023-01-23
Applicant: Apple Inc.
Inventor： Woorim Shin , Morteza Nick , David M. Signoff
CPC classification number: H04B1/0458 , H04B1/16 , H04B2001/0408
Abstract: Wireless circuitry can have an antenna coupled to a receiving amplifier. The receiving amplifier may be coupled to a local feedback loop configured to reduce the gain of the receiving amplifier for suppressing the signal power when receiving a large input signal. The local feedback loop can include a detector and a feedback controller. The detector may have an input coupled to the receiving amplifier and can output a detected signal. The feedback controller may receive the detected signal and output a corresponding control signal. The control signal can be used to reduce the gain of the receiving amplifier by adjusting one or more components within or coupled to the receiving amplifier. Suppressing large input signals in this way presents no additional parasitic loading to the downlink path and can thus provide overvoltage protection without degrading receiver performance.
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Patent Agency Ranking
公开(公告)号：US20230336186A1
公开(公告)日：2023-10-19
申请号：US18338920
申请日：2023-06-21
Applicant: Apple Inc.
Inventor： Yi Zhao , David M. Signoff
Abstract: A number of unit cells of a digital-to-analog converter (DAC) may be simultaneously activated to generate an analog signal. However, while each unit cell may be generally the same, there may be variations such as non-linearity or noise in the analog output depending on which unit cells are activated for a given digital signal value. For example, as additional unit cells are activated for increased values of the analog signal, the fill order in which the unit cells are activated may affect the linearity/noise of the DAC. The decision units may be programmable to select which branches of the fractal DAC to activate, changing the fill order based on a fill-selection signal. The fill order may be set by a fill controller via the fill-selection signal to account for manufacturing variations, gradients in the supply voltage, output line routing, and/or environmental factors such as temperature.
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公开(公告)号：US11700011B2
公开(公告)日：2023-07-11
申请号：US17471786
申请日：2021-09-10
Applicant: Apple Inc.
Inventor： Yi Zhao , David M. Signoff
Abstract: A number of unit cells of a digital-to-analog converter (DAC) may be simultaneously activated to generate an analog signal. However, while each unit cell may be generally the same, there may be variations such as non-linearity or noise in the analog output depending on which unit cells are activated for a given digital signal value. For example, as additional unit cells are activated for increased values of the analog signal, the fill order in which the unit cells are activated may affect the linearity/noise of the DAC. The decision units may be programmable to select which branches of the fractal DAC to activate, changing the fill order based on a fill-selection signal. The fill order may be set by a fill controller via the fill-selection signal to account for manufacturing variations, gradients in the supply voltage, output line routing, and/or environmental factors such as temperature.
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公开(公告)号：US20240250604A1
公开(公告)日：2024-07-25
申请号：US18099674
申请日：2023-01-20
Applicant: Apple Inc.
Inventor： David M. Signoff , Fei Wang , Kefei Wu , Song Hu , Morteza Nick , Xiang Guan
Abstract: Radio frequency (RF) transmitters of a device (aggressor device) may unintentionally transmit a high-power output signal to antennas of a receiving device (victim device). In some RF systems, a victim device may have no or little protection between its antennas and transistors in an integrated circuit. Performance or lifetime of the transistors may be negatively impacted due to large voltage swings that may result from the high-power signal received from the aggressor device. To prevent or mitigate impact to performance or lifetime of the transistors due to the large voltage swings, protection circuitry including switches and a direct current (DC) power source (e.g., a charge pump) may be implemented at an input of a receiver of the victim device to shunt the power from sensitive circuit components of the victim device.
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公开(公告)号：US20240022223A1
公开(公告)日：2024-01-18
申请号：US18476190
申请日：2023-09-27
Applicant: Apple Inc.
Inventor： Kefei Wu , Morteza Nick , David M. Signoff , Preeti S. Mulage
CPC classification number: H03G3/3026 , H03F3/72 , H04B1/0053 , H03G2201/103 , H03F2200/24
Abstract: This disclosure is directed to reducing output voltage distortions of Variable Gain Amplifiers (VGAs). A VGA may include a number of amplifiers each providing a portion of a total gain of the VGA. For example, a processing circuit may select one or more of the amplifiers of the VGA to provide the output signal with a selected gain. However, the selected amplifiers may provide amplified signals with one or more distortion signals when receiving a bias voltage. Systems and methods are described to reduce or cancel the distortion signals of the selected amplifiers by providing a subthreshold nonzero bias voltage (e.g., a weak voltage) to the remaining (e.g., non-selected) amplifiers of the VGA. For example, the non-selected amplifiers may receive the weak voltage to provide distortion signals with similar voltage amplitude and out of phase compared to the distortion signals of the selected amplifiers.
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公开(公告)号：US20200186092A1
公开(公告)日：2020-06-11
申请号：US16212656
申请日：2018-12-06
Applicant: Apple Inc.
Inventor： David M. Signoff , Morteza Nick , Anuranjan Jha
Abstract: A power amplifier and method for operating the same is disclosed. The amplifier includes a number of transistors coupled in series between a power node and a ground node. These transistors include a first transistor having a source terminal coupled to the power node, and a second transistor having its source terminal coupled to a ground node. A subset of transistors is also coupled in series between the first and second transistors. During operation in a first mode, the first and second transistors act as switching transistors, switching according to data received thereby. The subset of transistors, during the first mode, act as cascode transistors. During a second mode of operation, the transistors of the subset act as switching transistors, switching in accordance with the received data.
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