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公开(公告)号:US11307921B2
公开(公告)日:2022-04-19
申请号:US17114388
申请日:2020-12-07
Applicant: Apple Inc.
Inventor: Christopher J. Noe , Joshua H. Berlin , Joseph J. Castro , Hardik K. Doshi , Joel N. Kerr , Kerry J. Kopp , Michael J. Smith
Abstract: One embodiment provides for a data processing system comprising multiple independent processors to execute multiple operating system environments of the data processing system, the multiple operating system environments to enable operation of multiple regions of a computing device associated with the data processing system. The multiple operating system environments are interconnected via a transport agnostic communication link. In response to detection of a fatal error in one or more of the multiple operating system environments, the multiple operating system environments coordinate performance of multiple separate error handling operations within the multiple operating system environments to generate a combined error log. The combined error log includes operational states of the multiple operating system environments.
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公开(公告)号:US10860412B2
公开(公告)日:2020-12-08
申请号:US16147330
申请日:2018-09-28
Applicant: Apple Inc.
Inventor: Christopher J. Noe , Joshua H. Berlin , Joseph J. Castro , Hardik K. Doshi , Joel N. Kerr , Kerry J. Kopp , Michael J. Smith
IPC: G06F11/07
Abstract: One embodiment provides for a data processing system comprising multiple independent processors to execute multiple operating system environments of the data processing system, the multiple operating system environments to enable operation of multiple regions of a computing device associated with the data processing system. The multiple operating system environments are interconnected via a transport agnostic communication link. In response to detection of a fatal error in one or more of the multiple operating system environments, the multiple operating system environments coordinate performance of multiple separate error handling operations within the multiple operating system environments to generate a combined error log. The combined error log includes operational states of the multiple operating system environments.
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公开(公告)号:US20210117265A1
公开(公告)日:2021-04-22
申请号:US17114388
申请日:2020-12-07
Applicant: Apple Inc.
Inventor: Christopher J. Noe , Joshua H. Berlin , Joseph J. Castro , Hardik K. Doshi , Joel N. Kerr , Kerry J. Kopp , Michael J. Smith
Abstract: One embodiment provides for a data processing system comprising multiple independent processors to execute multiple operating system environments of the data processing system, the multiple operating system environments to enable operation of multiple regions of a computing device associated with the data processing system. The multiple operating system environments are interconnected via a transport agnostic communication link. In response to detection of a fatal error in one or more of the multiple operating system environments, the multiple operating system environments coordinate performance of multiple separate error handling operations within the multiple operating system environments to generate a combined error log. The combined error log includes operational states of the multiple operating system environments.
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公开(公告)号:US20190179695A1
公开(公告)日:2019-06-13
申请号:US16147330
申请日:2018-09-28
Applicant: Apple Inc.
Inventor: Christopher J. Noe , Joshua H. Berlin , Joseph J. Castro , Hardik K. Doshi , Joel N. Kerr , Kerry J. Kopp , Michael J. Smith
IPC: G06F11/07
Abstract: One embodiment provides for a data processing system comprising multiple independent processors to execute multiple operating system environments of the data processing system, the multiple operating system environments to enable operation of multiple regions of a computing device associated with the data processing system. The multiple operating system environments are interconnected via a transport agnostic communication link. In response to detection of a fatal error in one or more of the multiple operating system environments, the multiple operating system environments coordinate performance of multiple separate error handling operations within the multiple operating system environments to generate a combined error log. The combined error log includes operational states of the multiple operating system environments.
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公开(公告)号:US10795427B2
公开(公告)日:2020-10-06
申请号:US15720916
申请日:2017-09-29
Applicant: Apple Inc.
Inventor: Hardik K. Doshi , Gopal Thirumalai Narayanan , Siddharth P. Shah , Joseph J. Castro , Craig S. Forbell , Christopher M. Aycock , Varaprasad V. Lingutla
IPC: G06F1/3287 , G06F1/3206 , G06F9/4401
Abstract: A method from managing power state transitions in a computing system is disclosed. A processor may initiate a change in power state from a first initial power state to a first new power state and, in response to initiating the change, send an initial notification to a system integrated circuit using a first communication channel, and deactivate the first communication based on responses to the initial notification. The processor may enter the first new power state in response to the deactivation of the first communication channel, and send a final notification to a management controller using a second communication channel. The management controller may send a message to the system integrated circuit upon receiving the final notification. The system integrated circuit may then transition from a second initial power state to a second new power state based on the message.
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公开(公告)号:US20180348850A1
公开(公告)日:2018-12-06
申请号:US15720916
申请日:2017-09-29
Applicant: Apple Inc.
Inventor: Hardik K. Doshi , Gopal Thirumalai Narayanan , Siddharth P. Shah , Joseph J. Castro , Craig S. Forbell , Christopher M. Aycock , Varaprasad V. Lingutla
Abstract: A method from managing power state transitions in a computing system is disclosed. A processor may initiate a change in power state from a first initial power state to a first new power state and, in response to initiating the change, send an initial notification to a system integrated circuit using a first communication channel, and deactivate the first communication based on responses to the initial notification. The processor may enter the first new power state in response to the deactivation of the first communication channel, and send a final notification to a management controller using a second communication channel. The management controller may send a message to the system integrated circuit upon receiving the final notification. The system integrated circuit may then transition from a second initial power state to a second new power state based on the message.
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