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公开(公告)号:US12009849B2
公开(公告)日:2024-06-11
申请号:US17411892
申请日:2021-08-25
Applicant: Apple Inc.
Inventor: Xiaofang Mu , Bo Zhang , Mingjuan Zhu , Chi V. Pham , Berke Cetinoneri , Timothy B. Ogilvie
CPC classification number: H04B1/0483 , H04B1/0057 , H04B1/52 , H04B2001/0408
Abstract: Frequency-filtering circuitry is disclosed that rejects power of a wireless signal having an undesired frequency while causing a decreased power loss to a wireless signal having a desired frequency using distributed elements, rather than lumped elements. The frequency-filtering circuitry may reject at least 5 decibels of power of a wireless signal having a frequency over 32 gigahertz, while causing a power loss of at most 1.1 decibels to a wireless signal having a frequency lower than 29.5 gigahertz. The frequency-filtering circuitry may include a main branch, a first parallel branch coupled and parallel to the main branch via a first connecting trace, and a second parallel branch coupled and parallel to the main branch via a second connecting trace. The first connecting trace intersects the main branch and the first parallel branch, and the second connecting trace intersects the main branch and the second parallel branch.
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公开(公告)号:US20230064458A1
公开(公告)日:2023-03-02
申请号:US17411892
申请日:2021-08-25
Applicant: Apple Inc.
Inventor: Xiaofang Mu , Bo Zhang , Mingjuan Zhu , Chi V. Pham , Berke Cetinoneri , Timothy B. Ogilvie
Abstract: Frequency-filtering circuitry is disclosed that rejects power of a wireless signal having an undesired frequency while causing a decreased power loss to a wireless signal having a desired frequency using distributed elements, rather than lumped elements. The frequency-filtering circuitry may reject at least 5 decibels of power of a wireless signal having a frequency over 32 gigahertz, while causing a power loss of at most 1.1 decibels to a wireless signal having a frequency lower than 29.5 gigahertz. The frequency-filtering circuitry may include a main branch, a first parallel branch coupled and parallel to the main branch via a first connecting trace, and a second parallel branch coupled and parallel to the main branch via a second connecting trace. The first connecting trace intersects the main branch and the first parallel branch, and the second connecting trace intersects the main branch and the second parallel branch.
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公开(公告)号:US20230361460A1
公开(公告)日:2023-11-09
申请号:US17738787
申请日:2022-05-06
Applicant: Apple Inc.
Inventor: Xiaofang Mu , Chi V Pham , Mingjuan Zhu , Bo Tong Deng , Bo Zhang , Srinivasa Yasasvy Sateesh Bhamidipati , Vineet Nayak , Daniel C Kong
IPC: H01Q1/52 , H01L23/552 , H01L23/498 , H01Q1/48 , H01Q1/22
CPC classification number: H01Q1/526 , H01L23/552 , H01L23/49827 , H01Q1/48 , H01Q1/2283 , H01L2223/6677
Abstract: Techniques to reduce signal interference between wired signals communicated within an electronic device and wireless signals transmitted to or received from antennas of the electronic device are disclosed. The electronic device includes an interposer with an inner fence and an outer fence having offset gaps to prevent a pathway otherwise formed by overlapping tabs, where the pathway allows noise leakage from the wired signals. In some embodiments, the electronic device (e.g., in a main logic board package) includes a ground fencing of ground vias to prevent the noise leakage from harmonics associated with signal vias communicating the wired signals. The spacing between the ground vias is based on frequencies of signals that the ground vias are intended to block.
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公开(公告)号:US20250149782A1
公开(公告)日:2025-05-08
申请号:US19020580
申请日:2025-01-14
Applicant: Apple Inc.
Inventor: Xiaofang Mu , Chi V. Pham , Mingjuan Zhu , Bo Tong Deng , Bo Zhang , Srinivasa Yasasvy Sateesh Bhamidipati , Vineet Nayak , Daniel C. Kong
IPC: H01Q1/52 , H01L23/498 , H01L23/552 , H01Q1/22 , H01Q1/48 , H05K1/02
Abstract: Techniques to reduce signal interference between wired signals communicated within an electronic device and wireless signals transmitted to or received from antennas of the electronic device are disclosed. The electronic device includes an interposer with an inner fence and an outer fence having offset gaps to prevent a pathway otherwise formed by overlapping tabs, where the pathway allows noise leakage from the wired signals. In some embodiments, the electronic device (e.g., in a main logic board package) includes a ground fencing of ground vias to prevent the noise leakage from harmonics associated with signal vias communicating the wired signals. The spacing between the ground vias is based on frequencies of signals that the ground vias are intended to block.
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公开(公告)号:US12230879B2
公开(公告)日:2025-02-18
申请号:US17738787
申请日:2022-05-06
Applicant: Apple Inc.
Inventor: Xiaofang Mu , Chi V Pham , Mingjuan Zhu , Bo Tong Deng , Bo Zhang , Srinivasa Yasasvy Sateesh Bhamidipati , Vineet Nayak , Daniel C Kong
IPC: H05K1/02 , H01L23/498 , H01L23/552 , H01Q1/22 , H01Q1/48 , H01Q1/52
Abstract: Techniques to reduce signal interference between wired signals communicated within an electronic device and wireless signals transmitted to or received from antennas of the electronic device are disclosed. The electronic device includes an interposer with an inner fence and an outer fence having offset gaps to prevent a pathway otherwise formed by overlapping tabs, where the pathway allows noise leakage from the wired signals. In some embodiments, the electronic device (e.g., in a main logic board package) includes a ground fencing of ground vias to prevent the noise leakage from harmonics associated with signal vias communicating the wired signals. The spacing between the ground vias is based on frequencies of signals that the ground vias are intended to block.
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公开(公告)号:US20240297672A1
公开(公告)日:2024-09-05
申请号:US18658606
申请日:2024-05-08
Applicant: Apple Inc.
Inventor: Xiaofang Mu , Bo Zhang , Mingjuan Zhu , Chi V. Pham , Berke Cetinoneri , Timothy B. Ogilvie
CPC classification number: H04B1/0483 , H04B1/0057 , H04B1/52 , H04B2001/0408
Abstract: Frequency-filtering circuitry is disclosed that rejects power of a wireless signal having an undesired frequency while causing a decreased power loss to a wireless signal having a desired frequency using distributed elements, rather than lumped elements. The frequency-filtering circuitry may reject at least 5 decibels of power of a wireless signal having a frequency over 32 gigahertz, while causing a power loss of at most 1.1 decibels to a wireless signal having a frequency lower than 29.5 gigahertz. The frequency-filtering circuitry may include a main branch, a first parallel branch coupled and parallel to the main branch via a first connecting trace, and a second parallel branch coupled and parallel to the main branch via a second connecting trace. The first connecting trace intersects the main branch and the first parallel branch, and the second connecting trace intersects the main branch and the second parallel branch.
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