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公开(公告)号：US11513585B1
公开(公告)日：2022-11-29
申请号：US17221076
申请日：2021-04-02
Applicant: Apple Inc.
Inventor： Patrick Y. Law , Robert A. Drebin , Keith Cox , James S. Ismail
IPC: G06F1/32 , G06F1/3234 , G06F1/3296 , G06F1/3218 , G06F1/324
Abstract: In one embodiment, a system includes power management control that controls a duty cycle of a processor to manage power. The duty cycle may be the amount of time that the processor is powered on as a percentage of the total time. By frequently powering up and powering down the processor during a period of time, the power consumption of the processor may be controlled while providing the perception that the processor is continuously available. For example, the processor may be a graphics processing unit (GPU), and the period of time over which the duty cycle is managed may be a frame to be displayed on the display screen viewed by a user of the system.
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Patent Agency Ranking
公开(公告)号：US10120728B2
公开(公告)日：2018-11-06
申请号：US15668360
申请日：2017-08-03
Applicant: Apple Inc.
Inventor： Robert A. Drebin , James Wang
Abstract: Techniques and structures relating to virtual graphics processing units (VGPUs) are disclosed. A VGPU may appear to software as an independent hardware GPU. However, two or more VGPUs can be implemented on the same GPU through the use of control structures and by duplicating some (but not all) hardware elements of the GPU. For example, additional registers and storage space may be added in a GPU supporting multiple VGPUs. Different execution priorities may be set for tasks and threads that correspond to the different supported VGPUs. Memory address space for the VGPUs may also be managed, including use of virtual address space for different VGPUs. Halting and resuming execution of different VGPUs allows for fine-grained execution control in various embodiments.
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公开(公告)号：US11009938B1
公开(公告)日：2021-05-18
申请号：US16139631
申请日：2018-09-24
Applicant: Apple Inc.
Inventor： Patrick Y. Law , Robert A. Drebin , Keith Cox , James S. Ismail
IPC: G06F1/32 , G06F1/3234 , G06F1/3218 , G06F1/3296 , G06F1/324
Abstract: In one embodiment, a system includes power management control that controls a duty cycle of a processor to manage power. The duty cycle may be the amount of time that the processor is powered on as a percentage of the total time. By frequently powering up and powering down the processor during a period of time, the power consumption of the processor may be controlled while providing the perception that the processor is continuously available. For example, the processor may be a graphics processing unit (GPU), and the period of time over which the duty cycle is managed may be a frame to be displayed on the display screen viewed by a user of the system.
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公开(公告)号：US10114446B1
公开(公告)日：2018-10-30
申请号：US15284660
申请日：2016-10-04
Applicant: Apple Inc.
Inventor： Patrick Y. Law , Robert A. Drebin , Keith Cox , James S. Ismail
Abstract: In one embodiment, a system includes power management control that controls a duty cycle of a processor to manage power. The duty cycle may be the amount of time that the processor is powered on as a percentage of the total time. By frequently powering up and powering down the processor during a period of time, the power consumption of the processor may be controlled while providing the perception that the processor is continuously available. For example, the processor may be a graphics processing unit (GPU), and the period of time over which the duty cycle is managed may be a frame to be displayed on the display screen viewed by a user of the system.
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公开(公告)号：US20170329646A1
公开(公告)日：2017-11-16
申请号：US15668360
申请日：2017-08-03
Applicant: Apple Inc.
Inventor： Robert A. Drebin , James Wang
CPC classification number: G06F9/5077 , G06T1/20 , G06T1/60
Abstract: Techniques and structures relating to virtual graphics processing units (VGPUs) are disclosed. A VGPU may appear to software as an independent hardware GPU. However, two or more VGPUs can be implemented on the same GPU through the use of control structures and by duplicating some (but not all) hardware elements of the GPU. For example, additional registers and storage space may be added in a GPU supporting multiple VGPUs. Different execution priorities may be set for tasks and threads that correspond to the different supported VGPUs. Memory address space for the VGPUs may also be managed, including use of virtual address space for different VGPUs. Halting and resuming execution of different VGPUs allows for fine-grained execution control in various embodiments.
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公开(公告)号：US09494994B1
公开(公告)日：2016-11-15
申请号：US14549656
申请日：2014-11-21
Applicant: Apple Inc.
Inventor： Patrick Y. Law , Robert A. Drebin , Keith Cox , James S. Ismail
CPC classification number: G06F1/3206 , G06F1/206 , G06F1/3203 , G06F1/324 , G06F1/3287 , G06F1/3296 , Y02D10/126 , Y02D10/16 , Y02D10/171 , Y02D10/172
Abstract: In one embodiment, a system includes power management control that controls a duty cycle of a processor to manage power. The duty cycle may be the amount of time that the processor is powered on as a percentage of the total time. By frequently powering up and powering down the processor during a period of time, the power consumption of the processor may be controlled while providing the perception that the processor is continuously available. For example, the processor may be a graphics processing unit (GPU), and the period of time over which the duty cycle is managed may be a frame to be displayed on the display screen viewed by a user of the system.
Abstract translation: 在一个实施例中，系统包括控制处理器管理电力的占空比的电源管理控制。 占空比可以是处理器上电的时间量占总时间的百分比。 通过在一段时间内频繁地加电和断电处理器，可以控制处理器的功耗，同时提供处理器持续可用的感知。 例如，处理器可以是图形处理单元（GPU），并且管理占空比的时间段可以是要在系统的用户观看的显示屏上显示的帧。
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