公开(公告)号：US20240306297A1

公开(公告)日：2024-09-12

申请号：US18601668

申请日：2024-03-11

Applicant: Apple Inc.

Inventor： Anne M. Mason ,  Chad O. Simpson ,  William Hannon ,  Mark J. Beesley

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/42

CPC classification number: H05K1/115 ,  H05K3/0047 ,  H05K3/422 ,  H05K3/423 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/107

Abstract: Structures that implement three-dimensional (3D) conductive material (e.g., copper) in printed circuit boards (PCBs) are disclosed. 3D (three-dimensional) conductive material may include trenches and/or buried vias that are filled with conductive material in the PCBs. Trenches may be formed in build-up layers of a PCB by overlapping multiple laser drilled vias. The trenches may be filled with conductive material using electroplating process(es). Buried vias may be formed through the core layers of the PCB by mechanical drilling. The buried via may be filled with solid conductive material using a combination of electroless plating and electrolytic plating of conductive material. Various PCB structures are disclosed that implement combinations of these trenches and/or these buried vias filled with conductive material.

公开(公告)号：US11956898B2

公开(公告)日：2024-04-09

申请号：US17119126

申请日：2020-12-11

Applicant: Apple Inc.

Inventor： Anne M. Mason ,  Chad O. Simpson ,  William Hannon ,  Mark J. Beesley

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/42

CPC classification number: H05K1/115 ,  H05K3/0047 ,  H05K3/422 ,  H05K3/423 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/107

Abstract: Structures that implement three-dimensional (3D) conductive material (e.g., copper) in printed circuit boards (PCBs) are disclosed. 3D (three-dimensional) conductive material may include trenches and/or buried vias that are filled with conductive material in the PCBs. Trenches may be formed in build-up layers of a PCB by overlapping multiple laser drilled vias. The trenches may be filled with conductive material using electroplating process(es). Buried vias may be formed through the core layers of the PCB by mechanical drilling. The buried via may be filled with solid conductive material using a combination of electroless plating and electrolytic plating of conductive material. Various PCB structures are disclosed that implement combinations of these trenches and/or these buried vias filled with conductive material.

公开(公告)号：US20220095455A1

公开(公告)日：2022-03-24

申请号：US17119126

申请日：2020-12-11

Applicant: Apple Inc.

Inventor： Anne M. Mason ,  Chad O. Simpson ,  William Hannon ,  Mark J. Beesley

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/42

Abstract: Structures that implement three-dimensional (3D) conductive material (e.g., copper) in printed circuit boards (PCBs) are disclosed. 3D (three-dimensional) conductive material may include trenches and/or buried vias that are filled with conductive material in the PCBs. Trenches may be formed in build-up layers of a PCB by overlapping multiple laser drilled vias. The trenches may be filled with conductive material using electroplating process(es). Buried vias may be formed through the core layers of the PCB by mechanical drilling. The buried via may be filled with solid conductive material using a combination of electroless plating and electrolytic plating of conductive material. Various PCB structures are disclosed that implement combinations of these trenches and/or these buried vias filled with conductive material.